CLA70000 Zarlink Semiconductor, CLA70000 Datasheet - Page 6
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CLA70000
Manufacturer Part Number
CLA70000
Description
High Density CMOS Gate Arrays
Manufacturer
Zarlink Semiconductor
Datasheet
1.CLA70000.pdf
(17 pages)
CLA70000 Series
OPOD5B
OPOD11B
OPOS1
OPOS2
OPOS3
OPOS6
OPOS12
OPOS5B
OPOS11B
Power Supply Cells
OPVP
OPVM
OPVPB
OPVMB
OPVPBB
OPVMBB
IBVP
IBVM
IBVPB
IBVMB
IBVPBB
IBVMBB
LAVP
LAVM
LAGND
LAVDD
CLA70000 PDS-BIST (JTAG/IEEE1149-1) Library
Test Register Cells
JTRDU4,8,16,24,32
JTRDD4,8,16,24,32
JTRCU4,8,16,24,32
JTRCD4,8,16,24,32
6
Standard drive non-inverting open-drain
output cell
Large drive non-inverting open-drain
output cell
Smallest drive open-source output cell
Small drive open-source output cell
Standard drive open-source output cell
Medium drive open-source output cell
Large drive open-source output cell
Standard drive non-inverting open-source
output cell
Large drive non-inverting open-source
output cell
VDD power pad (outputs)
GND power pad (outputs)
VDD power pad (outputs) : break in VDD
GND power pad (outputs) : break in GND
VDD power pad (outputs) : break in VDD &
GND
GND power pad (outputs) : break in VDD &
GND
VDD power pad (buffers)
GND power pad (buffers)
VDD power pad (buffers) : break in VDD
GND power pad (buffers) : break in GND
VDD power pad (buffers) : break in VDD &
GND
GND power pad (buffers) : break in VDD &
GND
Power pad for logic array
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4,8,16,24,32 bit Transparent Test
registers with Update Latches
4,8,16,24,32 bit Transparent
Test registers
4,8,16,24,32 bit Clocked Test
registers with Update Latches
4,8,16,24,32 bit Clocked
Test Registers
Test Control Cells
JTAP
JTCLK
JTIDREG
Test Register Component Cells
JTDUT
JTDUF
JTDDT
JTDDF
JTCUT
JTCUF
JTCDT
JTCDF
JTCT
JTBF16
JTBF16
CLA70000 DSP Macrocell Library
Ripple Carry Adders
ADR1
ADR3
ADR8
ADR16
ADR24
ADR32
High Speed Carry Select Adders
ADS1
ADS3
ADS8
ADS16
ADS24
ADS32
Carry Select Adders (Reduced Area)
ADT8
ADT16
ADT24
Test register data bit (transparent)
with update latch
Test register data bit (transparent)]
with update latch
Test register data bit (transparent)
Test register data bit (transparent)
Test register data bit (clocked)
with update latch
Test register data bit (clocked)
with update latch
Test register data bit (clocked)
Test register data bit (clocked)
Test register local controller
PDS BIST JTAG Interface Controller
PDS-BIST Clock Gating and Buffer Cell
PDS-BIST JTAG Identification Register
Test register driver 4-19 databits
Test register driver 20-34 databits
1bit adder
4 bit adder
8 bit adder
16 bit adder
24 bit adder
32 bit adder
1bit adder
4 bit adder
8 bit adder
16 bit adder
24 bit adder
32 bit adder
8 bit adder
16 bit adder
24 bit adder