MT18VDDT3272 Micron, MT18VDDT3272 Datasheet - Page 12

• Manufacturer Part Number: MT18VDDT3272
• Description: 184-Pin Registered DDR SDRAM DIMMs (x72)
• Manufacturer: Micron

*DRAM components only
a - Value calculated as one module bank in this operating condition, and all other module banks in I
b - Value calculated reflects all module banks in this operating condition.
32, 64 Meg x 72 DDR SDRAM DIMMs
DD18C32_64X72AG_B.p65–Rev. B, Pub. 1/02
I
(Notes: 1–5, 8, 10, 12; notes appear following parameter tables)
(0°C
OPERATING CURRENT: Four device bank interleaving READs (BL=4)
PARAMETER/CONDITION
OPERATING CURRENT: One device bank; Active-Precharge;
t
inputs changing once per clock cycle; Address and control inputs
changing once every two clock cycles;
OPERATING CURRENT: One device bank; Active-Read-Precharge;
Burst = 2;
Address and control inputs changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All device banks
idle; Power-down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
t
changing once per clock cycle. V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank
active; Power-down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device
bank; Active-Precharge;
DM, and DQS inputs changing twice per clock cycle; Address and
other control inputs changing once per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst;
One device bank active; Address and control inputs changing
once per clock cycle;
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One
device bank active; Address and control inputs changing once
per clock cycle;
changing twice per clock cycle
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE
with auto precharge,
and control inputs change only during Active, READ, or WRITE
commands.
DD
RC =
CK =
SPECIFICATIONS AND CONDITIONS* 256MB Module
T
t
t
RC (MIN);
CK (MIN); CKE = HIGH; Address and other control inputs
A
t
RC =
+70°C; V
t
t
CK =
RC (MIN);
t
CK =
DD
t
t
CK =
t
CK (MIN); DQ, DM, and DQS inputs
Q = +2.5V ±0.2V, V
RC =
t
CK (MIN); DQ, DM, and DQS
t
RC =
t
CK =
t
t
t
CK =
t
CK (MIN); I
RC (MIN);
CK =
t
RAS (MAX);
t
0.2V
CK (MIN); CKE = LOW;
t
CK (MIN); I
IN
t
CK (MIN); CKE = LOW
= V
t
OUT
REF
CK =
for DQ, DQS, and DM
= 0mA
DD
t
CK =
OUT
t
CK (MIN); Address
= +2.5V ±0.2V)
= 0mA;
t
CK (MIN); DQ,
t
t
RC =
RC = 15.625µs
t
12
RFC (MIN)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
184-pin DDR SDRAM DIMMs
SYMBOL
I
I
I
I
I
I
DD
I
DD
I
I
I
I
DD
DD
DD
DD
I
DD
DD
DD
DD
DD
DD
4W
3N
2P
3P
4R
2F
256MB, 512MB (ECC x72)
0
5
6
7
8
1
b
b
b
a
a
a
b
b
b
a
b
a
-26A/-265
1017
1107
3960
2952
810
1017
972
324
630
54
90
36
MAX
1017
3690
2367
-202
927
630
324
630
837
837
54
90
54
DD
2P (CKE LOW) Mode.
UNITS
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
©2002, Micron Technology, Inc.
21, 28, 45
21, 28, 45
NOTES
20, 43
20, 43
20, 43
20, 45
25, 45
20, 44
46
42
20
9