LM3S3749 Luminary Micro, Inc, LM3S3749 Datasheet - Page 651

• Manufacturer Part Number: LM3S3749
• Description: Lm3s3749 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Reset
Reset
Type
Type
PWM0 Fault Source 0 (PWM0FLTSRC0)
Base 0x4002.8000
Offset 0x074
Type R/W, reset 0x0000.0000
June 02, 2008
Bit/Field
31:4
RO
RO
3
2
1
31
15
0
0
RO
RO
Register 63: PWM0 Fault Source 0 (PWM0FLTSRC0), offset 0x074
Register 64: PWM1 Fault Source 0 (PWM1FLTSRC0), offset 0x0B4
Register 65: PWM2 Fault Source 0 (PWM2FLTSRC0), offset 0x0F4
Register 66: PWM3 Fault Source 0 (PWM3FLTSRC0), offset 0x134
This register is instantiated in each PWM generator, and it specifies which fault pin outputs are used
to signal a fault condition.
If the FLTSRC bit in the PWMnCTL register (see page 629) is clear, only the Fault0 bit affects the
fault condition generated. Otherwise, all other bits affect the fault condition generated.
30
14
0
0
RO
RO
29
13
reserved
0
0
FAULT3
FAULT2
FAULT1
Name
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
R/W
R/W
R/W
RO
RO
RO
26
10
0
0
reserved
RO
RO
Reset
25
0
9
0
0
0
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Fault3
The same function as Fault0, except applied for the FAULT3 input.
Note:
Fault2
The same function as Fault0, except applied for the FAULT2 input.
Note:
Fault1
The same function as Fault0, except applied for the FAULT1 input.
Note:
RO
RO
23
0
7
0
The FLTSRC bit in the PWMnCTL register must be set for this
bit to affect fault condition generation.
The FLTSRC bit in the PWMnCTL register must be set for this
bit to affect fault condition generation.
The FLTSRC bit in the PWMnCTL register must be set for this
bit to affect fault condition generation.
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
FAULT3
R/W
RO
19
0
3
0
LM3S3749 Microcontroller
FAULT2
R/W
RO
18
0
2
0
FAULT1
R/W
RO
17
0
1
0
FAULT0
R/W
RO
16
0
0
0
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