LM3S3749 Luminary Micro, Inc, LM3S3749 Datasheet - Page 134

• Manufacturer Part Number: LM3S3749
• Description: Lm3s3749 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Reset
Reset
Type
Type
System Control
Software Reset Control 1 (SRCR1)
Base 0x400F.E000
Offset 0x044
Type R/W, reset 0x00000000
134
Bit/Field
reserved
31:26
23:20
11:9
25
24
19
18
17
16
15
14
13
12
RO
RO
8
31
15
0
0
I2C1
R/W
RO
Register 33: Software Reset Control 1 (SRCR1), offset 0x044
Writes to this register are masked by the bits in the Device Capabilities 2 (DC2) register.
30
14
0
0
reserved
RO
RO
29
13
reserved
reserved
reserved
reserved
reserved
0
0
TIMER3
TIMER2
TIMER1
TIMER0
COMP1
COMP0
Name
reserved
QEI0
I2C1
I2C0
I2C0
R/W
RO
28
12
0
0
RO
RO
27
11
0
0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
reserved
RO
RO
26
10
0
0
COMP1
R/W
RO
Reset
25
0
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
COMP0
Preliminary
QEI0
R/W
R/W
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Analog Comp 1 Reset Control. Reset control for analog comparator 1.
Analog Comp 0 Reset Control. Reset control for analog comparator 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Timer 3 Reset Control. Reset control for General-Purpose Timer module
3.
Timer 2 Reset Control. Reset control for General-Purpose Timer module
2.
Timer 1 Reset Control. Reset control for General-Purpose Timer module
1.
Timer 0 Reset Control. Reset control for General-Purpose Timer module
0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
I2C1 Reset Control. Reset control for I2C unit 1.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
I2C0 Reset Control. Reset control for I2C unit 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
QEI0 Reset Control. Reset control for QEI unit 0.
RO
RO
23
0
7
0
reserved
RO
RO
22
0
6
0
reserved
SSI1
R/W
RO
21
0
5
0
SSI0
R/W
RO
20
0
4
0
reserved
TIMER3
R/W
RO
19
0
3
0
TIMER2
UART2
R/W
R/W
18
0
2
0
TIMER1
UART1
R/W
R/W
17
0
1
0
June 02, 2008
TIMER0
UART0
R/W
R/W
16
0
0
0