LM3S3749 Luminary Micro, Inc, LM3S3749 Datasheet - Page 252

• Manufacturer Part Number: LM3S3749
• Description: Lm3s3749 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

General-Purpose Input/Outputs (GPIOs)
10.1.1
10.1.1.1 Data Direction Operation
10.1.1.2 Data Register Operation
252
Figure 10-2. Analog/Digital I/O Pads
Data Control
The data control registers allow software to configure the operational modes of the GPIOs. The data
direction register configures the GPIO as an input or an output while the data register either captures
incoming data or drives it out to the pads.
The GPIO Direction (GPIODIR) register (see page 260) is used to configure each individual pin as
an input or output. When the data direction bit is set to 0, the GPIO is configured as an input and
the corresponding data register bit will capture and store the value on the GPIO port. When the data
direction bit is set to 1, the GPIO is configured as an output and the corresponding data register bit
will be driven out on the GPIO port.
To aid in the efficiency of software, the GPIO ports allow for the modification of individual bits in the
GPIO Data (GPIODATA) register (see page 259) by using bits [9:2] of the address bus as a mask.
This allows software drivers to modify individual GPIO pins in a single instruction, without affecting
the state of the other pins. This is in contrast to the "typical" method of doing a read-modify-write
operation to set or clear an individual GPIO pin. To accommodate this feature, the GPIODATA
register covers 256 locations in the memory map.
Interrupt
Alternate Input
Alternate Output
Alternate Output Enable
GPIOPeriphID0
GPIOPeriphID1
GPIOPeriphID2
GPIOPeriphID3
GPIOLOCK
GPIODATA
GPIODIR
GPIOMIS
GPIOICR
Interrupt
GPIOIBE
GPIOIEV
GPIORIS
GPIOCR
Commit
Control
Control
Control
GPIOIM
GPIOIS
Data
Identification Registers
GPIOPeriphID4
GPIOPeriphID5
GPIOPeriphID6
GPIOPeriphID7
GPIO Input
GPIO Output
GPIO Output Enable
GPIOAFSEL
Control
Mode
GPIOAMSEL
GPIODR2R
GPIODR4R
GPIODR8R
GPIOPUR
GPIOPDR
GPIOODR
GPIODEN
GPIOSLR
Control
Pad
GPIOPCellID0
GPIOPCellID1
GPIOPCellID2
GPIOPCellID3
Preliminary
Pad Input
Pad Output
Pad Output Enable
PortD4 – 7 pins that
Analog/Digital
connect to the ADC
(for PortE4 – 7 and
input MUX)
I/O Pad
ADC
Analog Circuitry
Isolation
Circuit
June 02, 2008
Package I/O Pin