LM3S1607 Luminary Micro, Inc, LM3S1607 Datasheet - Page 6

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LM3S1607

Manufacturer Part Number
LM3S1607
Description
Lm3s1607 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Table of Contents
13.2.1 Sample Sequencers ................................................................................................................ 340
13.2.2 Module Control ........................................................................................................................ 341
13.2.3 Hardware Sample Averaging Circuit ......................................................................................... 342
13.2.4 Analog-to-Digital Converter ...................................................................................................... 342
13.2.5 Differential Sampling ............................................................................................................... 342
13.2.6 Internal Temperature Sensor .................................................................................................... 344
13.3
13.3.1 Module Initialization ................................................................................................................. 345
13.3.2 Sample Sequencer Configuration ............................................................................................. 345
13.4
13.5
14
14.1
14.2
14.2.1 Transmit/Receive Logic ........................................................................................................... 372
14.2.2 Baud-Rate Generation ............................................................................................................. 373
14.2.3 Data Transmission .................................................................................................................. 373
14.2.4 Serial IR (SIR) ......................................................................................................................... 374
14.2.5 FIFO Operation ....................................................................................................................... 375
14.2.6 Interrupts ................................................................................................................................ 375
14.2.7 Loopback Operation ................................................................................................................ 376
14.2.8 DMA Operation ....................................................................................................................... 376
14.2.9 IrDA SIR block ........................................................................................................................ 377
14.3
14.4
14.5
15
15.1
15.2
15.2.1 Bit Rate Generation ................................................................................................................. 415
15.2.2 FIFO Operation ....................................................................................................................... 415
15.2.3 Interrupts ................................................................................................................................ 415
15.2.4 Frame Formats ....................................................................................................................... 416
15.2.5 DMA Operation ....................................................................................................................... 423
15.3
15.4
15.5
16
16.1
16.2
16.2.1 I
16.2.2 Available Speed Modes ........................................................................................................... 456
16.2.3 Interrupts ................................................................................................................................ 457
16.2.4 Loopback Operation ................................................................................................................ 458
16.2.5 Command Sequence Flow Charts ............................................................................................ 458
16.3
16.4
6
Initialization and Configuration ................................................................................................. 344
Register Map .......................................................................................................................... 345
Register Descriptions .............................................................................................................. 346
Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 371
Block Diagram ........................................................................................................................ 372
Functional Description ............................................................................................................. 372
Initialization and Configuration ................................................................................................. 377
Register Map .......................................................................................................................... 378
Register Descriptions .............................................................................................................. 379
Synchronous Serial Interface (SSI) ................................................................................ 414
Block Diagram ........................................................................................................................ 414
Functional Description ............................................................................................................. 415
Initialization and Configuration ................................................................................................. 424
Register Map .......................................................................................................................... 425
Register Descriptions .............................................................................................................. 426
Inter-Integrated Circuit (I
Block Diagram ........................................................................................................................ 453
Functional Description ............................................................................................................. 453
Initialization and Configuration ................................................................................................. 464
I
2
2
C Bus Functional Overview .................................................................................................... 454
C Register Map ..................................................................................................................... 465
2
C) Interface ............................................................................ 453
Preliminary
June 02, 2008

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