LM3S1607 Luminary Micro, Inc, LM3S1607 Datasheet - Page 17

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LM3S1607

Manufacturer Part Number
LM3S1607
Description
Lm3s1607 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Universal Asynchronous Receivers/Transmitters (UARTs) ..................................................... 371
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Synchronous Serial Interface (SSI) ............................................................................................ 414
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June 02, 2008
ADC Sample Sequence FIFO 0 Status (ADCSSFSTAT0), offset 0x04C ............................. 365
ADC Sample Sequence FIFO 1 Status (ADCSSFSTAT1), offset 0x06C ............................. 365
ADC Sample Sequence FIFO 2 Status (ADCSSFSTAT2), offset 0x08C ............................ 365
ADC Sample Sequence FIFO 3 Status (ADCSSFSTAT3), offset 0x0AC ............................ 365
ADC Sample Sequence Input Multiplexer Select 1 (ADCSSMUX1), offset 0x060 ............... 366
ADC Sample Sequence Input Multiplexer Select 2 (ADCSSMUX2), offset 0x080 ............... 366
ADC Sample Sequence Control 1 (ADCSSCTL1), offset 0x064 ........................................ 367
ADC Sample Sequence Control 2 (ADCSSCTL2), offset 0x084 ........................................ 367
ADC Sample Sequence Input Multiplexer Select 3 (ADCSSMUX3), offset 0x0A0 ............... 369
ADC Sample Sequence Control 3 (ADCSSCTL3), offset 0x0A4 ........................................ 370
UART Data (UARTDR), offset 0x000 ............................................................................... 380
UART Receive Status/Error Clear (UARTRSR/UARTECR), offset 0x004 ........................... 382
UART Flag (UARTFR), offset 0x018 ................................................................................ 384
UART IrDA Low-Power Register (UARTILPR), offset 0x020 ............................................. 386
UART Integer Baud-Rate Divisor (UARTIBRD), offset 0x024 ............................................ 387
UART Fractional Baud-Rate Divisor (UARTFBRD), offset 0x028 ....................................... 388
UART Line Control (UARTLCRH), offset 0x02C ............................................................... 389
UART Control (UARTCTL), offset 0x030 ......................................................................... 391
UART Interrupt FIFO Level Select (UARTIFLS), offset 0x034 ........................................... 393
UART Interrupt Mask (UARTIM), offset 0x038 ................................................................. 395
UART Raw Interrupt Status (UARTRIS), offset 0x03C ...................................................... 397
UART Masked Interrupt Status (UARTMIS), offset 0x040 ................................................. 398
UART Interrupt Clear (UARTICR), offset 0x044 ............................................................... 399
UART DMA Control (UARTDMACTL), offset 0x048 .......................................................... 401
UART Peripheral Identification 4 (UARTPeriphID4), offset 0xFD0 ..................................... 402
UART Peripheral Identification 5 (UARTPeriphID5), offset 0xFD4 ..................................... 403
UART Peripheral Identification 6 (UARTPeriphID6), offset 0xFD8 ..................................... 404
UART Peripheral Identification 7 (UARTPeriphID7), offset 0xFDC ..................................... 405
UART Peripheral Identification 0 (UARTPeriphID0), offset 0xFE0 ...................................... 406
UART Peripheral Identification 1 (UARTPeriphID1), offset 0xFE4 ...................................... 407
UART Peripheral Identification 2 (UARTPeriphID2), offset 0xFE8 ...................................... 408
UART Peripheral Identification 3 (UARTPeriphID3), offset 0xFEC ..................................... 409
UART PrimeCell Identification 0 (UARTPCellID0), offset 0xFF0 ........................................ 410
UART PrimeCell Identification 1 (UARTPCellID1), offset 0xFF4 ........................................ 411
UART PrimeCell Identification 2 (UARTPCellID2), offset 0xFF8 ........................................ 412
UART PrimeCell Identification 3 (UARTPCellID3), offset 0xFFC ........................................ 413
SSI Control 0 (SSICR0), offset 0x000 .............................................................................. 427
SSI Control 1 (SSICR1), offset 0x004 .............................................................................. 429
SSI Data (SSIDR), offset 0x008 ...................................................................................... 431
SSI Status (SSISR), offset 0x00C ................................................................................... 432
SSI Clock Prescale (SSICPSR), offset 0x010 .................................................................. 434
SSI Interrupt Mask (SSIIM), offset 0x014 ......................................................................... 435
SSI Raw Interrupt Status (SSIRIS), offset 0x018 .............................................................. 437
SSI Masked Interrupt Status (SSIMIS), offset 0x01C ........................................................ 438
SSI Interrupt Clear (SSIICR), offset 0x020 ....................................................................... 439
SSI DMA Control (SSIDMACTL), offset 0x024 ................................................................. 440
Preliminary
LM3S1607 Microcontroller
17

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