LM3S1607 Luminary Micro, Inc, LM3S1607 Datasheet - Page 10

• Manufacturer Part Number: LM3S1607
• Description: Lm3s1607 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
Figure 15-9.
Figure 15-10. MICROWIRE Frame Format (Single Frame) .................................................................... 422
Figure 15-11. MICROWIRE Frame Format (Continuous Transfer) ......................................................... 423
Figure 15-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements ........................ 423
Figure 16-1.
Figure 16-2.
Figure 16-3.
Figure 16-4.
Figure 16-5.
Figure 16-6.
Figure 16-7.
Figure 16-8.
Figure 16-9.
Figure 16-10. Master Burst RECEIVE .................................................................................................. 461
Figure 16-11. Master Burst RECEIVE after Burst SEND ........................................................................ 462
Figure 16-12. Master Burst SEND after Burst RECEIVE ........................................................................ 463
Figure 16-13. Slave Command Sequence ............................................................................................ 464
Figure 17-1.
Figure 20-1.
Figure 20-2.
Figure 20-3.
Figure 20-4.
Figure 20-5.
Figure 20-6.
Figure 20-7.
Figure 20-8.
Figure 20-9.
Figure 20-10. Power-On Reset Timing ................................................................................................. 510
Figure 20-11. Brown-Out Reset Timing ................................................................................................ 511
Figure 20-12. Software Reset Timing ................................................................................................... 511
Figure 20-13. Watchdog Reset Timing ................................................................................................. 511
Figure 21-1.
10
Freescale SPI Frame Format with SPO=1 and SPH=1 ..................................................... 421
I
I
START and STOP Conditions ......................................................................................... 454
Complete Data Transfer with a 7-Bit Address ................................................................... 455
R/S Bit in First Byte ........................................................................................................ 455
Data Validity During Bit Transfer on the I
Master Single SEND ...................................................................................................... 458
Master Single RECEIVE ................................................................................................. 459
Master Burst SEND ....................................................................................................... 460
64-Pin LQFP Package Pin Diagram ................................................................................ 488
Load Conditions ............................................................................................................ 503
I
Hibernation Module Timing ............................................................................................. 506
SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing Measurement .............. 507
SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer ............................. 507
SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ................................................. 508
JTAG Test Clock Input Timing ......................................................................................... 509
JTAG Test Access Port (TAP) Timing .............................................................................. 509
External Reset Timing (RST) .......................................................................................... 510
64-Pin LQFP Package ................................................................................................... 512
2
2
2
C Block Diagram ......................................................................................................... 453
C Bus Configuration .................................................................................................... 454
C Timing ..................................................................................................................... 505
Preliminary
2
C Bus ............................................................... 455
June 02, 2008