XC2S50 Xilinx, Inc., XC2S50 Datasheet - Page 45

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XC2S50

Manufacturer Part Number
XC2S50
Description
Spartan-II 2.5V FPGA Family
Manufacturer
Xilinx, Inc.
Datasheet

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Spartan-II 2.5V FPGA Family: Functional Description
Table 18: Effective Output Power/Ground Pairs for
Spartan-II Devices
Termination Examples
Creating a design with the Versatile I/O features requires
the instantiation of the desired library symbol within the
design code. At the board level, designers need to know the
termination techniques required for each I/O standard.
This section describes some common application examples
illustrating the termination techniques recommended by
each of the standards supported by the Versatile I/O fea-
tures. For a full range of accepted values for the DC voltage
specifications for each standard, refer to the table associ-
ated with each figure.
The resistors used in each termination technique example
and the transmission lines depicted represent board level
components and are not meant to represent components
on the device.
Module 2 of 4
38
VQ100
CS144
TQ144
PQ208
FG256
FG456
Pkg.
XC2S
12
12
15
8
-
-
-
XC2S
12
12
16
30
8
-
-
Spartan-II Devices
XC2S
12
16
16
50
-
-
-
XC2S
100
12
16
16
48
-
-
XC2S
150
16
16
48
-
-
-
XC2S
200
16
16
48
www.xilinx.com
1-800-255-7778
-
-
-
GTL
A sample circuit illustrating a valid termination technique for
GTL is shown in
specifications.
Table 19: GTL Voltage Specifications
Notes:
1.
V
V
V
V
V
V
V
I
I
I
OH
OL
OL
OH
OL
CCO
REF
TT
IH
IL
N must be greater than or equal to 0.653 and less than or
equal to 0.68.
≤ V
at V
at V
≥ V
GTL
at V
V
= N × V
REF
CCO
REF
OL
OL
Parameter
OH
(mA) at 0.4V
(mA) at 0.2V
= NA
– 0.05
(mA)
+ 0.05
TT
Figure 41: Terminated GTL
50Ω
(1)
V
TT
Figure
= 1.2V
41.
DS001-2 (v2.2) September 3, 2003
Z = 50
0.74
1.14
0.79
Table 19
Min
V
32
REF
-
-
-
-
-
-
= 0.8V
50Ω
V
Product Specification
TT
= 1.2V
lists DC voltage
0.85
0.75
Typ
N/A
0.8
1.2
0.2
-
-
-
-
DS001_43_061200
Max
0.86
1.26
0.81
0.4
40
-
-
-
-
-
R

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