XC2S100E-7PQ208C Xilinx, Inc., XC2S100E-7PQ208C Datasheet - Page 80

• Manufacturer Part Number: XC2S100E-7PQ208C
• Description: 100000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
• Manufacturer: Xilinx, Inc.

XC2S50 Device Pinouts (Continued)
DS001-4 (v2.8) June 13, 2008
Product Specification
Notes:
1.
2.
3.
I/O
I/O
I/O, V
GND
I/O
I/O
I/O
I/O
I/O
V
V
GND
I/O
I/O
I/O
I/O
I/O
I/O, V
GND
I/O
I/O
I/O
I/O
I/O
TCK
V
V
04/18/01
XC2S50 Pad Name
CCINT
CCO
CCO
CCO
Function
IRDY and TRDY can only be accessed when using Xilinx PCI
cores.
Pads labelled GND*, V
V
V
independent ground or power planes within the package.
See
REF
REF
CCO
CCO
"VCCO Banks"
Bank 2*, V
Bank 6*, V
R
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
-
-
-
-
-
CCO
CCO
for details on V
Bank 3*, V
TQ144
Bank 7* are internally bonded to
P144
CCINT
P12
P11
P10
P9
P8
P7
P6
P5
P4
P3
P2
P1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
*, V
CCO
CCO
PQ208
P188
P189
P190
P191
P192
P193
P194
P195
P196
P197
P198
P199
P200
P201
P202
P203
P204
P205
P206
P207
P208
P208
-
-
-
-
-
CCO
Bank 0*, V
Bank 4*, V
banking.
V
Bank 0*
Bank 0*
Bank 7*
FG256
GND*
GND*
GND*
V
V
V
CCINT
D8
A6
C8
D7
E7
C7
C6
D6
D5
C5
C4
B7
B6
CCO
A5
B5
A4
B4
E6
A3
B3
CCO
CCO
CCO
CCO
*
Bank 1*,
Bank 5*,
Bndry
Scan
104
107
110
113
116
119
122
125
128
131
134
137
140
83
86
89
92
95
98
www.xilinx.com
-
-
-
-
-
-
-
-
Additional XC2S50 Package Pins
TQ144
11/02/00
P104
P105
Spartan-II FPGA Family: Pinout Tables
Not Connected Pins
-
-
-
Module 4 of 4
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80