XC2S100E-7PQ208C Xilinx, Inc., XC2S100E-7PQ208C Datasheet - Page 76

• Manufacturer Part Number: XC2S100E-7PQ208C
• Description: 100000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
• Manufacturer: Xilinx, Inc.

XC2S30 Device Pinouts (Continued)
DS001-4 (v2.8) June 13, 2008
Product Specification
V
I/O
I/O
I/O
I/O
I/O
GND
I/O, V
I/O
I/O
I/O
I, GCK2
GND
V
V
I, GCK3
V
I/O
I/O
I/O, V
GND
I/O
I/O
I/O
I/O
I/O
V
V
GND
I/O
I/O
I/O
XC2S30 Pad Name
CCINT
CCO
CCO
CCINT
CCINT
CCO
Function
REF
REF
R
Bank
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
-
-
-
-
-
-
VQ100 TQ144 CS144 PQ208
P85
P86
P87
P88
P89
P90
P90
P91
P92
P93
P94
P95
P96
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
P24
P23
P22
P21
P20
P19
P18
P17
P16
P16
P15
P14
P13
P12
P11
P10
P9
P8
P7
P6
-
-
-
-
-
-
-
-
-
-
-
-
A9
D8
C8
B8
A8
B7
A7
C7
D7
D7
A6
B6
C6
D6
A5
B5
C5
D5
A4
B4
-
-
-
-
-
-
-
-
-
-
-
-
P171
P172
P173
P174
P175
P176
P177
P178
P179
P180
P181
P182
P183
P184
P184
P185
P186
P187
P188
P189
P190
P191
P192
P193
P194
P195
P196
P197
P198
P199
P200
P201
Bndry
Scan
www.xilinx.com
24
27
30
33
36
39
42
45
48
54
55
62
65
68
71
74
77
80
83
86
89
92
-
-
-
-
-
-
-
-
-
-
XC2S30 Device Pinouts (Continued)
Additional XC2S30 Package Pins
I/O, V
I/O
I/O
I/O
TCK
V
V
04/18/01
Notes:
1.
2.
VQ100
11/02/00
TQ144
11/02/00
CS144
11/02/00
PQ208
11/02/00
Notes:
1.
XC2S30 Pad Name
CCO
CCO
P104
P165
Function
P28
P60
M3
P7
IRDY and TRDY can only be accessed when using Xilinx
PCI cores.
See
For the PQ208 package, P13, P38, P118, and P143, which
are Not Connected Pins on the XC2S30, are assigned to
V
REF
CCINT
"VCCO Banks"
on larger devices.
P105
P202
P29
P13
P97
N3
Bank
0
0
0
0
0
7
-
Spartan-II FPGA Family: Pinout Tables
Not Connected Pins
Not Connected Pins
Not Connected Pins
Not Connected Pins
VQ100 TQ144 CS144 PQ208
P100
P100
P112
P98
P97
P99
P38
for details on V
-
-
-
-
-
-
P144
P5
P4
P3
P2
P1
-
P118
P44
-
-
-
-
CCO
C4
A3
B3
C3
A2
B2
-
banking.
P143
P55
-
-
-
-
P203
P204
P205
P206
P207
P208
P208
Module 4 of 4
P149
P56
Bndry
Scan
-
-
-
-
101
104
95
98
-
-
-
76