AD8343 Analog Devices, AD8343 Datasheet - Page 21

• Manufacturer Part Number: AD8343
• Description: DC-to-2.5 GHz High IP3 Active Mixer
• Manufacturer: Analog Devices

R1A and R1B set the core bias current of 18.5 mA per side. L1A
and L1B provide the RF choking required to avoid shunting the
signal. Z1, Z2A, and Z2B comprise a typical input matching net-
work that is designed to match the AD8343’s differential input
impedance to the differential output impedance of the balun.
The IF output is taken through a 4:1 (impedance ratio) trans-
former that reflects a 200 Ω differential load to the collectors.
This output coupling arrangement is reasonably broadband,
although in some cases the user might want to consider adding a
resonator tank circuit between the collectors to provide a mea-
sure of IF selectivity. The ferrite bead (FB), in series with the
output transformer’s center tap, addresses the common-mode
stability concern.
In this circuit the PWDN pin is shown connected to GND,
which enables the mixer. In order to enter power-down mode
and conserve power, the PWDN pin should be taken within
500 mV of VPOS.
The DCPL pin should be bypassed to GND with about 0.1 µF.
Failure to do so could result in a higher noise level at the output
of the device.
Upconverting Mixer
A typical upconversion application is shown in Figure 22. Both
the input and output single-ended-to-differential conversions
are obtained through the use of 1:1 transmission line baluns.
The differential input and output matching networks are designed
between the balun and the I/O pins of the AD8343. The local
oscillator signal at a level of –12 dBm to –3 dBm is brought in
through a third 1:1 balun.
LO IN
R
FIN
0.1 F
0.1 F
0.1 F
AD8343
DCPL
PWDN
LOIM
LOIP
VPOS
0.1 F
Z1
V
POS
BIAS
Z2
Z2
A
B
COMM
R1
INPP
A
R1A and R1B set the core bias current of 18.5 mA per side. Z1,
Z2A, and Z2B comprise a typical input matching network that
is designed to match the AD8343’s differential input impedance
to the differential output impedance of the balun. It was assumed
for this example that the input frequency is low and that the
magnitude of the device’s input impedance is therefore much
smaller than the bias resistor values, allowing the input bias
inductors to be eliminated with very little penalty in gain or
noise performance.
In this example, the output signal is taken via a differential
matching network comprising Z3 and Z4A/B, then through the
1:1 balun and dc blocking capacitors to the single-ended output.
The output frequency is assumed to be high enough that conju-
gate matching to the output of the AD8343 is desirable, so the
goal of the matching network is to provide a conjugate match
between the device’s output and the differential input of the
output balun.
This circuit uses shunt feed to provide collector bias for the
transistors because the output balun in this circuit has no con-
venient center-tap. The ferrite beads, in series with the output’s
bias inductors, provide some small degree of damping to ease
the common-mode stability problem. Unfortunately this type of
output balun may present a common-mode load that enters the
region of output instability, so most of the burden of avoiding
overt instability falls on the input circuit, which should present
an inductive common-mode termination over as broad a band of
frequencies as possible.
The PWDN pin is shown as tied to GND, which enables the
mixer. The DCPL pin should be bypassed to GND with about
0.1 µF in order to bypass noise from the internal bias circuit.
R1
OUTM
INPM
OUTP
B
Z3
V
V
POS
FB
FB
POS
Z4
Z4
A
B
RF
OUT
AD8343