AD8343 Analog Devices, AD8343 Datasheet - Page 19

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AD8343

Manufacturer Part Number
AD8343
Description
DC-to-2.5 GHz High IP3 Active Mixer
Manufacturer
Analog Devices
Datasheet

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The idea is to make a differential measurement at the output of
the balun, with the single-ended port of the balun terminated in
50 Ω. Again, there are two methods available for making this
measurement: use of the ATN Multiport Network Analyzer to
measure the differential impedance directly, or use of a standard
two-port network analyzer and Konstroffer’s transformation
equation.
In order to utilize a standard two-port analyzer, connect the two
ports of the calibrated vector network analyzer (VNA) to the
balanced output pins of the balun, measure the two-port S
parameters, then use Konstroffer’s formula to convert the two-
port parameters to one-port differential Γ .
Step 3: Measure AD8343 Differential Impedance at Location
of First Matching Component
Once the target impedance is established, the next step in
matching to the AD8343 is to measure the differential imped-
ance at the location of the first matching component. The “A”
side of the evaluation board is designed to facilitate doing so.
Before doing the board measurements, it is necessary to perform
a full two-port calibration of the VNA at the ends of the cables
that will be used to connect to the board’s input connectors,
using the SOLT (Short, Open, Load, Thru) method or equiva-
lent. It is a good idea to set the VNA’s sweep span to a few
hundred MHz or more for this work because it is often useful to
see what the circuit is doing over a large range of frequencies,
not just at the intended operating frequency. This is particularly
useful for detecting stability problems.
After the calibration is completed, connect network analyzer
ports one and two to the differential inputs of the AD8343
Evaluation Board.
On the AD8343 Evaluation Board, it is necessary to temporarily
install jumpers at Z1A and Z3A if Z4A is the desired component
location. Zero ohm resistors or capacitors of sufficient value
to exhibit negligible reactance work nicely for this purpose.
Next, extend the reference plane to the location of your first
matching component. This is accomplished by solidly shorting
both pads at the component location to GND (Note: Power to the
board must be OFF for this operation!) Adjust the VNA reference
plane extensions to make the entire trace collapse to a point (or
best approximation thereof near the desired frequency) at the
zero impedance point of the Smith Chart. Do this for each port.
A reasonable way to provide a good RF short is to solder a piece
of thin copper or brass sheet on edge across the pads to the nearby
GND pads.
Now, remove the short, apply power to the board, and take
readings. Take a look at both S11 and S22 to verify that they
remain inside the unit circle of the Smith Chart over the whole
frequency range being swept. If they fail to do so, this is a sign
that the device is unstable (perhaps due to an inappropriate
common-mode load) or that the network analyzer calibration is
wrong. Either way the problem must be addressed before pro-
ceeding further.
Assuming that the values look reasonable, use Konstroffer’s
formula to convert to differential Γ .
Γs
=
(
2
×
S
11
(
2
S
21 1
S
21 1
)
(
)
(
S
22
S
22
S
12
S
12
)
+
)
(
+
1
(
1
S
11
S
11
S
21 1
S
21 1
)
(
)
(
+
S
+
22 2
S
22
− ×
)
S
12
)
Step 4: Design the Matching Network
The next step is to perform a trial design of a matching network
utilizing standard impedance matching techniques. The network
may be designed using single-ended network values, then con-
verted to differential form as illustrated in Figure 8. Figure 19
shows a theoretical design of a series C/shunt C “L” network
applied between 50 Ω and a typical load at 1.8 GHz.
This theoretical design is important because it establishes the
basic topology and the initial matching value for the network.
The theoretical value of 2.9 pF for the initial matching com-
ponent is not available in standard capacitor values, so a 3.0 pF
is placed in the first shunt matching location. This value may
prove to be too large, causing an overshoot of the 50 Ω real imped-
ance circle, or too small, causing the opposite effect. Always keep
in mind that this is a measure of differential impedance. The value
of the capacitor should be modified to achieve the desired 50 Ω
real impedance.
However, it may occasionally happen that the inserted shunt
capacitor moves the impedance in completely unexpected and
undesired ways. This is almost always an indication that the
reference plane was improperly extended for the measurement.
The user should readjust the reference planes and attempt the
shunt capacitor match with another calculated value.
When a differential impedance of 50 Ω (real part) is achieved,
the board should be deenergized and another short placed on
the board in preparation for resetting the port extensions to a
new reference plane location. This short should be placed where
next the series components are expected to be added, and it is
important that both ports one and two be extended to this point
on the board.
Another differential measurement must be taken at this point to
establish the starting impedance value for the next matching
component. Note that if 50 Ω PCB traces of finite length are
used to connect pads, the impedance will experience an angular
rotation to another location on the Smith Chart as indicated in
Figure 20.
0.2
0.5
2.9pF SHUNT CAPACITOR
1.0
AD8343
5.0

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