AD8343 Analog Devices, AD8343 Datasheet - Page 18

• Manufacturer Part Number: AD8343
• Description: DC-to-2.5 GHz High IP3 Active Mixer
• Manufacturer: Analog Devices

AD8343
At low LO frequencies, it is reasonable to drive the AD8343
with a single-ended LO, connecting the undriven terminal to
GND through a dc block. This will result in an input impedance
closer to 25 Ω at low frequencies, which should be factored
into the design. At higher LO frequencies, differential drive
is recommended.
The suggested minimum LO power level is about –12 dBm. This
can be seen in Figure 17.
DC Coupling the LO
The AD8343’s LO limiting amplifier chain is internally dc-
coupled. In some applications or experimental situations it is
useful to exploit this property. This section addresses some ways
in which to do it.
The LO pins are internally biased at about 360 mV with respect
to COMM. Driving the LO to either extreme requires injecting
several hundred microamps into one LO pin and extracting
about the same amount of current from the other. The incre-
mental impedance at each pin is about 25 Ω, so the voltage level
on each pin is disturbed very little by the application of external
currents in that range.
Figure 18 illustrates how to drive the LO port with continuous
dc and also from standard ECL powered by –5.2 V.
–10
–15
–20
–25
–30
5
4
3
2
1
0
–5
–40
0
0
500
–30
FREQUENCY (50MHz – 2500MHz)
LO POWER – dBm
1000
–20
INPUT RF = 900MHz
OUTPUT IF = 170MHz
LO LOW SIDE INJECTION
1500
CONVERSION GAIN
NOISE FIGURE
–10
2000
2500
25
20
15
10
5
0
A Step-by-Step Approach to Impedance Matching
The following discussion addresses, in detail, the matter of
establishing a differential impedance match to the AD8343.
This section will specifically deal with the input match, and
using side “A” of the evaluation board (Figure 23). An analo-
gous procedure would be used to establish a match to the
output if desired.
Step 1: Circuit Setup
In order to do this work the AD8343 must be powered up, driven
with LO; its outputs should be terminated in a manner that
avoids the common-mode stability problem as discussed in
the Input and Output Stability section. A convenient way to
deal with the output termination is to place ferrite chokes at
L3A and L4A and omit the output matching components
altogether.
It is also important to establish the means of providing bias
currents to the input pins because this network may have
unexpected loading effects and inhibit matching progress.
Step 2: Establish Target Impedance
This step is necessary when the single-ended-to-differential
network (input balun) does not produce a 50 Ω output imped-
ance. In order to provide for maximum power transfer, the input
impedance of the matching network, loaded with the AD8343
input impedance (including ballast resistors), should be the conju-
gate of the output impedance of the single-ended-to-differential
network. This step is of particular importance when utilizing
transmission line baluns because the differential output imped-
ance of the input balun may differ significantly from what is
expected. Therefore, it is a good idea to make a separate mea-
surement of this impedance at the desired operating frequency
before proceeding with the matching of the AD8343.
–5.2V
ECL
–5.2V
–5.2V
13k
1k
3.6k
390
1.2k
390
1.2k
+5V
AD8343
DCPL
PWDN
LOIM
LOIP
3.6k
VPOS
AD8343
DCPL
LOIM
PWDN
LOIP
VPOS
BIAS
DRIVER
LO
BIAS
DRIVER
LO
COMM
INPP
COMM
INPP
INPM
OUTM
OUTP
OUTM
INPM
OUTP
CONTINUOUS
DC
ECL