AN2638 Freescale Semiconductor / Motorola, AN2638 Datasheet - Page 10

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AN2638

Manufacturer Part Number
AN2638
Description
Effects of Clock Jitter on the MPC8260 (HiP3 and HiP4)
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Conclusion
Conclusion
6.2 Worse case (Excessive Jitter)
In comparison, Figure 13 illustrates the scope capture of worse-case clock jitter. Probe 1 was connected to
SDRAM CLOCK_IN and probe 2 was connected to the CAS signal on theMPC8260. The measurement is
taken in “infinite persistence” mode to capture the minimum-to-maximum clock period variation.
7 Conclusion
The following list summarizes the key points for preventing clock jitter when designing a high-speed design
system:
10
1. Ensure proper board layout for power and ground planes as well as at the signal layer.
2. Provide a stable power supply voltage source for the MPC8260.
3. Provide a proper filtering for PLL power supply input pins.
4. Provide reference clock clear from frequency noise allowed within the AC requirements of the
5. Use recommended XFC capacitor value (refer to Chapter 10, Clocks,” in the MPC8260
6. Place the XFC capacitor as close as possible to the XFC pin on the MPC8260.
7. On systems where clock jitter is beyond the acceptable AC requirements of the system, add a
system.
PowerQUICC II Family Reference Manual.
series RC circuit (R
quick recovery of PLL lock condition for wider frequency bandwidth. Refer to Section 4.2, “XFC
RC Filter.”
Effects of Clock Jitter on the MPC8260 (HiP3 and HiP4)
Freescale Semiconductor, Inc.
xfc
For More Information On This Product,
+ C
Figure 13. Worse Case Clock Jitter
xfc
) to the XFC pin to provide a PLL noise rejections, thus allowing
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MOTOROLA

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