AN2408 Freescale Semiconductor / Motorola, AN2408 Datasheet - Page 8

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AN2408

Manufacturer Part Number
AN2408
Description
Examples of HCS12 External Bus Design A Companion Note to AN2287/D
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Example #3 — Byte-Wide SRAM Interface with Paging
Example #3 — Byte-Wide SRAM Interface with Paging
In the following schematic, a 128K SRAM device is attached to the external bus in expanded narrow
mode. The design introduces the paging capability of the HCS12 Family. Eight 16K pages of RAM are
added to the $8000–$BFFF window at page address $00–$07. Accesses to $20–$2F page will result in
invalid external accesses.
Comments:
8
The active-high chip-enable signal that is available on these SRAMs is important to the design,
because the ELCK signal is used as the enable to signal the completion of access to the SRAM. If
MCU signals that are gated with logic are used, the MCU data may be released before these gated
control signals negate, causing SRAM data corruption.
The ‘374 type latch and the SRAM access speed will require at least one additional MCU clock
stretch to access these devices or reduced MCU speed.
Figure 6. Expanded Wide Odd Byte Access ($55)
Examples of HCS12 External Bus Design, Rev. 2
Freescale Semiconductor

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