AN2408 Freescale Semiconductor / Motorola, AN2408 Datasheet - Page 10

• Manufacturer Part Number: AN2408
• Description: Examples of HCS12 External Bus Design A Companion Note to AN2287/D
• Manufacturer: Freescale Semiconductor / Motorola

Example #4 — Byte-Wide SRAM Interface (Narrow Mode) XCS/ECS Gated
Example #4 — Byte-Wide SRAM Interface (Narrow Mode) XCS/ECS Gated
The following schematic demonstrates the interface to a 8-bit SRAM to provide word access to the
external memory interface. It uses expanded narrow mode in order to support byte (x8) access to the
external device. It has the addition of logic to support additional banks of external memory.
Comments:
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The XCS or ECS signal is required because the external device does not possess the active-high
chip-enable needed for using the ECLK signal to activate the external device. If the ECS signal is
implemented, the ROMON bit must be clear, as internal memory has precedence over external
memory. Because not all HCS12 Family members have the XCS signal, this design will not be
applicable in all instances. The system designer should assess the overall design to determine
applicability.
This design introduces memory paging. An additional latch is provided to acquire the extended
address lines XAD[19..14]. This latch is not required in all instances. The system designer should
carefully study the device specifications and relevant errata to verify the system design.
The ECS/XCS signals improve access time. Replacing the ‘374 type latches with a ‘373
transparent device allows the address to be presented to the memory device in advance of the
rising ECLK edge. This enhancement and careful memory selection will allow higher speed access
to the external device.
Examples of HCS12 External Bus Design, Rev. 2
Freescale Semiconductor