AN2148 Motorola / Freescale Semiconductor, AN2148 Datasheet - Page 9

• Manufacturer Part Number: AN2148
• Description: Design Considerations for Interfacing SDRAM with MC68VZ328
• Manufacturer: Motorola / Freescale Semiconductor

3.1.2
The CSD register is used to determines three things:
By default, CSD register is set to use CAS[1:0] and RAS[1:0] function muxed to PB[5:4] and PB[3:2]
respectively. This is determined by the DRAM bit (bit9) of the CSD register.
The second is the BSW bit (bit7) which is ’0’ for 8-bit SDRAM and ’1’ for 16-bit SDRAM.
For the size of each SDRAM chip-select, the SIZ field (bits[3:1]) is employed. The values represented by
these bits need to be combined with the DSIZ3 bit of the CSCTRL1 register to configure the chip-select
size.
•
•
•
If chip-select group C will be used as CAS and RAS.
The bus width of the SDRAM.
The size for each SDRAM chip-select.
(With the influence of CSCTRL1)
Chip-Select Register D (CSD) & Chip-Select Control Register 1
(CSCTRL1)
0xFFFFFFFF
0x017FFFFF
0x00000000
0x01000000
DSIZ3
0
0
0
0
0
0
0
0
Figure 2. Chip-Select Base Address Register
(4Megx16-bit)
1
SDRAM
64Mbit
Table 5. SDRAM Chip-Select Size
0
0
0
0
1
1
1
1
SDRAM Control Registers
Pre-Publication Draft
SIZ [3:1]
0
0
1
1
0
0
1
1
SDRAM Starting Address = 0x01000000
CSGBD = 0x0800
0
1
0
1
0
1
0
1
SDRAM Size
128K
256K
512K
1MB
2MB
4MB
32K
64K
Chip-Select Registers
9