DS2196 Dallas Semiconducotr, DS2196 Datasheet - Page 85

• Manufacturer Part Number: DS2196
• Description: T1 Dual Framer LIU
• Manufacturer: Dallas Semiconducotr

14.
Each of the 24 T1 channels in the transmit direction of the framer can be either forced to be transparent or
in other words, can be forced to stop Bit 7 Stuffing from overwriting the data in the channels.
Transparency can be invoked on a channel by channel basis by properly setting the TTR1, TTR2, and
TTR3 registers.
Each of the bit position in the Transmit Transparency Registers (TTR1/TTR2/TTR3) represent a DS0
channel in the outgoing frame. When these bits are set to a 1, the corresponding channel is transparent
(or clear). If a DS0 is programmed to be clear, no Bit 7 stuffing will be performed. However, in the D4
framing mode, bit 2 will be overwritten by a zero when a Yellow Alarm is transmitted. Also the user has
the option to prevent the TTR registers from determining which channels are to have Bit 7 stuffing
performed. If the TCR2.0 and TCR1.3 bits are set to 1, then all 24 T1 channels will have Bit 7 stuffing
performed on them regardless of how the TTR registers are programmed. Please see Figure 21-7 for
more details.
TTR1A/TTR2A/TTR3A: TRANSMIT TRANSPARENCY REGISTER FRAMER A
(Address = 39 to 3B Hex)
TTR1B/TTR2B/TTR3B: TRANSMIT TRANSPARENCY REGISTER FRAMER B
(Address = D9 to DB Hex)
(MSB)
CH16
CH24
CH8
SYMBOLS
CH1-24
TRANSMIT TRANSPARENCY
CH15
CH23
CH7
POSITIONS
TTR1.0-3.7
CH14
CH22
CH6
CH13
CH21
CH5
NAME AND DESCRIPTION
Transmit Transparency Registers.
0 = this DS0 channel is not transparent
1 = this DS0 channel is transparent
CH12
CH20
CH4
85 of 157
CH11
CH19
CH3
CH10
CH18
CH2
(LSB)
CH17
CH1
CH9
TTR1
TTR2
TTR3
DS2196