DS2196 Dallas Semiconducotr, DS2196 Datasheet - Page 39

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DS2196

Manufacturer Part Number
DS2196
Description
T1 Dual Framer LIU
Manufacturer
Dallas Semiconducotr
Datasheet

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DS2196
Framer Loopback A
When CCR1A.0 is set to a 1, the A Framer/Formatter will enter a Framer Loopback (FLB) mode. This
loopback is useful in testing and debugging applications. In FLB, the DS2196 will loop data from the
transmit side back to the receive side. When FLB is enabled, the following will occur:
1. An unframed all 1’s code will be transmitted at TPOSOA and TNEGOA outputs
2. Data at RPOSIA and RNEGIA will be ignored
3. All receive side signals will take on timing synchronous with TCLKOA instead of RCLKIA.
NOTE:
The signals RCLKA and TCLKA cannot be the same clock during this loopback because this will cause
an unstable condition.
Framer Loopback B
When CCR1B.0 is set to a 1, the B Framer/Formatter will enter a Framer Loopback (FLB) mode. This
loopback is useful in testing and debugging applications. In FLB, the DS2196 will loop data from the
transmit side back to the receive side. When FLB is enabled, the following will occur:
1. An unframed all 1’s code will be transmitted at TPOSOB and TNEGOB outputs
2. Data at RPOSIB and RNEGIB will be ignored
3. All receive side signals will take on timing synchronous with TCLKOB instead of RCLKIB.
NOTE:
The signals RCLKB and TCLKB cannot be the same clock during this loopback because this will cause
an unstable condition.
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