AN1212 Freescale Semiconductor / Motorola, AN1212 Datasheet - Page 3

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AN1212

Manufacturer Part Number
AN1212
Description
J1850 Multiplex Bus Communication Using the MC68HC705C8 and the SC371016 J1850 Communications Interface (JCI)
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Frame Headers
and Addressing
MOTOROLA
J1850 Multiplex Bus Communication Using the MC68HC705C8
and the SC371016 J1850 Communications Interface (JCI)
Each frame can contain up to 12 bytes (PWM) or 101 bit times (VPW), with
each byte being transmitted MSB first. The optional in-frame response can
contain either a single byte or multiple bytes, with or without a CRC byte.
Table 1
features are used is determined by the requirements of each individual
network.
As outlined above, a J1850 frame can contain one of three types of headers,
depending upon a particular system’s requirements. The single-byte header
incorporates the frame priority/type and target address into a single byte. A
one-byte consolidated header also consolidates the frame priority/type and
target address into a single byte, with bit 4 = 1 to indicate that it is a one-byte
consolidated header. The three-byte header places the frame priority/type into
the first byte, the target address of the intended receiver(s) into the second
byte, and the source address of the frame originator into the third byte. In the
priority/type byte of the three-byte header, bit 4 = 0 to indicate it is a three-byte
header.
Frames transmitted on a J1850 network can be either physically or functionally
addressed. Since every node on a J1850 network must be assigned a unique
physical address, a frame can be addressed directly to any particular node by
making the node’s physical address the target address of the frame. This is
useful in applications such as diagnostic requests, where a specific node’s
identification may be important. Functional addressing is used when the data
being transmitted can be identified by its particular function, rather than its
intended receiver(s). With this form of addressing, a frame containing data is
transmitted with the function of that data encoded in the target address of the
frame. All nodes which require the data of that function can then receive it at
the same time. This is of particular importance to networks where the physical
Bit encoding
Bus medium
Data rate
Data integrity
IDLE
BUS
Freescale Semiconductor, Inc.
For More Information On This Product,
Feature
SOF PRI/TYPE
Figure 3. Consolidated Three-Byte Header Frame Format
summarizes the allowable features of the J1850 protocol. Which
Go to: www.freescale.com
TARGET I.D. SOURCE I.D. DATA 1
Table 1. J1850 Protocol Options
1 & 3 Byte
41.7 kbps
Dual wire
Headers
PWM
CRC
Single wire
1 & 3 Byte
10.4 kbps
Headers
VPW
CRC
DATA n CRC EOD
1 Byte Only
Single wire
Checksum
IFR
10.4 kbps
Header
J1850 Overview
VPW
EOF
AN1212/D
IDLE
BUS
3

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