AN1212 Freescale Semiconductor / Motorola, AN1212 Datasheet - Page 23

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AN1212

Manufacturer Part Number
AN1212
Description
J1850 Multiplex Bus Communication Using the MC68HC705C8 and the SC371016 J1850 Communications Interface (JCI)
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Receiving
MOTOROLA
NO
NO
INTO SPDR, INITIATING
LOCATION "data" INTO
LOCATION "command"
LOCATION "command"
LOAD BYTE IN SPDR
LOAD BYTE IN RAM
LOAD BYTE IN RAM
BIT COMBINATION
LOCATION "status"
SPDR, INITIATING
LOAD "do nothing"
CALL TXSTATUS
SPI TRANSFER
INTO MCU RAM
SPI TRANSFER
SPI TRANSFER
INTO MCU RAM
SPI TRANSFER
SUBROUTINE
COMPLETE?
COMPLETE?
YES
YES
IS
IS
J1850 Multiplex Bus Communication Using the MC68HC705C8
and the SC371016 J1850 Communications Interface (JCI)
When the JCI has received an error-free message fro the MUX bus which
meets the filtering criteria, the IRQ interrupt service routine performs the
necessary data retrieval, some additional filtering, and then stores the data in
a specified location in host RAM where the main application software can
access it.
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 13. TXSTATUS Subroutine
Go to: www.freescale.com
MESSAGE LENGTH TIME
READ VALUE IN TIMER
AND LOAD INTO OCRH
LOAD VALUE IN TCRL
TO VALUE IN TCRH,
STATUS REGISTER
RETURN FROM
ADD MINIMUM
SUBROUTINE
"status" SET?
"status" SET?
IS BIT 4 OF
INTO OCRL
IS BIT 5 OF
YES
NO
(TSR)
YES
NO
MC68HC705C8/JCI Interface Driver Routines
TRANSFER MESSAGE
SUBROUTINE TO
CALL TXDATA
IS "message
YES
to Tx" BIT
TO JCI
SET?
"Previous Tx Complete"
LOCATION "txcntrl"
NO
DISABLE TIMER
INTERRUPT
BIT IN RAM
SET
AN1212/D
23

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