DSP56F801 Motorola Inc, DSP56F801 Datasheet - Page 38

• Manufacturer Part Number: DSP56F801
• Description: 56F801 16-bit Hybrid Controller
• Manufacturer: Motorola Inc

3.11 JTAG Timing
38
TCK frequency of operation
TCK cycle time
TCK clock pulse width
TMS, TDI data setup time
TMS, TDI data hold time
TCK low to TDO data valid
TCK low to TDO tri-state
TRST assertion time
DE assertion time
1. Timing is both wait state and frequency dependent. For the values listed, T = clock cycle. For 80MHz
operation, T = 12.5ns.
2. TCK frequency of operation must be less than 1/8 the processor rate.
3. Parameters listed are guaranteed by design.
(Input)
TCK
Operating Conditions:
V
M
= V
IL
+ (V
Characteristic
IH
Figure 3-27 Test Clock Input Timing Diagram
– V
2
IL
)/2
V
IH
V
SS
Table 3-16 JTAG Timing
= V
56F801 Technical Data, Rev. 16
SSA
= 0 V, V
t
V
V
PW
M
IL
DD
= V
DDA
t
CY
Symbol
t
TRST
= 3.0–3.6 V, T
t
f
t
t
t
t
t
t
PW
OP
DH
CY
DS
DV
TS
DE
1, 3
t
PW
A
Min
100
DC
0.4
1.2
V
50
50
8T
—
—
= –40° to +85°C, C
M
Max
26.6
23.5
10
—
—
—
—
—
—
Freescale Semiconductor
L
≤
50pF
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns