DSP56F801 Motorola Inc, DSP56F801 Datasheet - Page 23

• Manufacturer Part Number: DSP56F801
• Description: 56F801 16-bit Hybrid Controller
• Manufacturer: Motorola Inc

3.5 External Clock Operation
The 56F801 device clock is derived from either 1) an internal crystal oscillator circuit working in
conjunction with an external crystal, 2) an external frequency source, or 3) an on-chip relaxation oscillator.
To generate a reference frequency using the internal crystal oscillator circuit, a reference crystal external
to the chip must be connected between the EXTAL and XTAL pins. Paragraphs 3.5.1 and 3.5.4 describe
these methods of clocking. Whichever type of clock derivation is used provides a reference signal to a
phase-locked loop (PLL) within the 56F801. In turn, the PLL generates a master reference frequency that
determines the speed at which chip operations occur.
Application code can be set to change the frequency source between the relaxation oscillator and crystal
oscillator or external source, and power down the relaxation oscillator if desired. Selection of which clock
is used is determined by setting the PRECS bit in the PLLCR (phase-locked loop control register) word
(bit 2). If the bit is set to 1, the external crystal oscillator circuit is selected. If the bit is set to 0, the internal
relaxation oscillator is selected, and this is the default value of the bit when power is first applied.
3.5.1
The internal oscillator is also designed to interface with a parallel-resonant crystal resonator in the
frequency range specified for the external crystal in
oscillator circuit. Follow the crystal supplier’s recommendations when selecting a crystal, since crystal
parameters determine the component values required to provide maximum stability and reliable start-up.
The crystal and associated components should be mounted as close as possible to the EXTAL and XTAL
pins to minimize output distortion and start-up stabilization time. The internal 56F80x oscillator circuitry
Freescale Semiconductor
IFREN
XADR
ERASE
NVSTR
MAS1
YE=SE=OE=0
XE
Crystal Oscillator
Tnvs
Figure 3-6 Flash Mass Erase Cycle
56F801 Technical Data, Rev. 16
Table
Tme
3-10.
Figure 3-7
shows a recommended crystal
Tnvh1
External Clock Operation
Trcv
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