DSP56371D Motorola Inc, DSP56371D Datasheet - Page 35

• Manufacturer Part Number: DSP56371D
• Description: high density CMOS device
• Manufacturer: Motorola Inc

temperature. Hence, the new thermal metric, thermal characterization parameter or Ψ
to be (T
when using the surface temperature of the package. Remember that surface temperature readings of
packages are subject to significant errors caused by inadequate attachment of the sensor to the surface
and to errors caused by heat loss to the sensor. The recommended technique is to attach a 40-gauge
thermocouple wire and bead to the top center of the package with thermally conductive epoxy.
18.2
Use the following list of recommendations to assure correct DSP operation:
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Provide a low-impedance path from the board power supply to each V
the board ground to each GND pin.
Use at least six 0.01–0.1 µF bypass capacitors positioned as close as possible to the four sides of
the package to connect the V
Ensure that capacitor leads and associated printed circuit traces that connect to the chip V
GND pins are less than 1.2 cm (0.5 inch) per capacitor lead.
Route the DVDD pin carefully to minimize noise.
Use at least a four-layer PCB with two inner layers for V
Because the DSP output signals have fast rise and fall times, PCB trace lengths should be minimal.
This recommendation particularly applies to the IRQA, IRQB, IRQC, and IRQD pins. Maximum PCB
trace lengths on the order of 15 cm (6 inches) are recommended.
Consider all device loads as well as parasitic capacitance due to PCB traces when calculating
capacitance. This is especially critical in systems with higher capacitive loads that could create
higher transient currents in the V
Take special care to minimize noise levels on the V
If multiple DSP56371 devices are on the same board, check for cross-talk or excessive spikes on
the supplies due to synchronous operation of the devices.
RESET must be asserted when the chip is powered up. A stable EXTAL signal must be supplied
before deassertion of RESET.
At power-up, ensure that the voltage difference between the 3.3 V tolerant pins and the chip V
never exceeds a 3.00 V.
– T
Electrical Design Considerations
T
)/P
D
. This value gives a better estimate of the junction temperature in natural convection
This device contains circuitry protecting against
damage due to high static voltage or electrical
fields. However, normal precautions should be
taken to avoid exceeding maximum voltage
ratings. Reliability of operation is enhanced if
unused inputs are tied to an appropriate logic
voltage level (e.g., either GND or V
suggested value for a pullup or pulldown resistor
is 10 k ohm.
Freescale Semiconductor, Inc.
For More Information On This Product,
CC
DSP56371 Technical Data
Go to: www.freescale.com
power source to GND.
CC
and GND circuits.
CAUTION
CCP
and GND
CC
and GND.
CC
). The
P
pins.
CC
Design Considerations
pin on the DSP and from
JT
, has been defined
CC
and
CC
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