DSP56371D Motorola Inc, DSP56371D Datasheet - Page 25

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DSP56371D

Manufacturer Part Number
DSP56371D
Description
high density CMOS device
Manufacturer
Motorola Inc
Datasheet
14.0
15.0
MOTOROLA
Note:
No.
Note:
106
107
108
109
110
111
112
113
114
115
No.
104
105
TIO
FOSC edge to GPIO out valid (GPIO out delay time)
FOSC edge to GPIO out not valid (GPIO out hold time)
FOSC In valid to EXTAL edge (GPIO in set-up time)
FOSC edge to GPIO in not valid (GPIO in hold time)
Minimum GPIO pulse high width (except Port F)
Minimum GPIO pulse low width (except Port F)
Minimum GPIO pulse low width (port F)
Minimum GPIO pulse high width (port F)
GPIO out rise time
GPIO out fall time
1.
TIO Low
TIO High
V
CORE_VDD
Timer Timing
GPIO Timing
V
pF
CORE_VDD
Characteristics
=
1.25 V ± 0.05
= 1.25 V ± 0.05 V; T
Figure 16 TIO Timer Event Input Restrictions
Characteristics
Freescale Semiconductor, Inc.
For More Information On This Product,
104
V; T
J
Table 11 Timer Timing
DSP56371 Technical Data
Go to: www.freescale.com
Table 12 GPIO Timing
= –40°C to 115°C for 150 MHz; T
J
= –40°C to 115°C for 150 MHz; T
1
105
Expression
2 × T
2 × T
C
C
+ 2.0
+ 2.0
Expression
J
= 0°C to 100°C for 181 MHz; C
Min
2 x T
2 x T
6 x T
6 x T
13
13
J
= 0°C to 100°C for 181 MHz; C
181 MHz
C
C
C
C
Max
Min
11.1
11.1
33.3
33.3
----
2
0
Timer Timing
Max
13
13
---
---
7
7
L
Unit
ns
ns
= 50 pF
L
Unit
ns
ns
ns
= 50
ns
ns
ns
ns
ns
ns
ns
25

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