HT68F04 Holtek Semiconductor, HT68F04 Datasheet - Page 71

• Manufacturer Part Number: HT68F04
• Description: Small Package Enhanced Flash Type 8-Bit MCU
• Manufacturer: Holtek Semiconductor

Timer/Counter Mode
To select this mode, bits TnM1 and TnM0 in the TMnC1
register should be set to 11 respectively. The
Timer/Counter Mode operates in an identical way to the
Compare Match Output Mode generating the same in-
terrupt flags. The exception is that in the Timer/Counter
Mode the TM output pin is not used. Therefore the
above description and Timing Diagrams for the Com-
pare Match Output Mode can be used to understand its
function. As the TM output pin is not used in this mode,
the pin can be used as a normal I/O pin or other
pin-shared function.
PWM Output Mode
To select this mode, bits TnM1 and TnM0 in the TMnC1
register should be set to 10 respectively and also the
TnIO1 and TnIO0 bits should be set to 10 respectively.
The PWM function within the TM is useful for applica-
tions which require functions such as motor control,
heating control, illumination control etc. By providing a
signal of fixed frequency but of varying duty cycle on the
TM output pin, a square wave AC waveform can be gen-
erated with varying equivalent DC RMS values.
Note:
Rev. 1.00
1. Here TnDPX = 0 - Counter cleared by CCRP
2. Counter Clear sets PWM Period
3. Internal PWM function continues even when TnIO1, TnIO0 = 00 or 01
4. TnCCLR bit has no influence on PWM operation
PWM Mode - TnDPX = 0
HT66F03/HT66F04/HT68F03/HT68F04
71
As both the period and duty cycle of the PWM waveform
can be controlled, the choice of generated waveform is
extremely flexible. In the PWM mode, the TnCCLR bit
has no effect as the PWM period. Both of the CCRA and
CCRP registers are used to generate the PWM wave-
form, one register is used to clear the internal counter
and thus control the PWM waveform frequency, while
the other one is used to control the duty cycle. Which
register is used to control either frequency or duty cycle
is determined using the TnDPX bit in the TMnC1 regis-
ter. The PWM waveform frequency and duty cycle can
therefore be controlled by the values in the CCRA and
CCRP registers.
An interrupt flag, one for each of the CCRA and CCRP,
will be generated when a compare match occurs from
either Comparator A or Comparator P. The TnOC bit in
the TMnC1 register is used to select the required polar-
ity of the PWM waveform while the two TnIO1 and
TnIO0 bits are used to enable the PWM output or to
force the TM output pin to a fixed high or low level. The
TnPOL bit is used to reverse the polarity of the PWM
output waveform.
April 16, 2010
www.DataSheet4U.com