HT68F04 Holtek Semiconductor, HT68F04 Datasheet - Page 57
HT68F04
Manufacturer Part Number
HT68F04
Description
Small Package Enhanced Flash Type 8-Bit MCU
Manufacturer
Holtek Semiconductor
Datasheet
1.HT68F04.pdf
(139 pages)
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·
·
Rev. 1.00
TM0AH Register
TM0C0 Register
Bit 7~2
Bit 1~0
Bit 7
Bit 6~4
Bit 3
Bit 2~0
Name
Name
POR
POR
R/W
R/W
Bit
Bit
T0PAU
Unimplemented, read as ²0²
TM0AH: TM0 CCRA High Byte Register bit 1 ~ bit 0
TM0 10-bit CCRA bit 9 ~ bit 8
T0PAU: TM0 Counter Pause Control
The counter can be paused by setting this bit high. Clearing the bit to zero restores normal
counter operation. When in a Pause condition the TM will remain powered up and continue to
consume power. The counter will retain its residual value when this bit changes from low to high
and resume counting from this value when the bit changes to a low value again.
T0CK2~T0CK0: Select TM0 Counter clock
These three bits are used to select the clock source for the TM. Selecting the Reserved clock
input will effectively disable the internal counter. The external pin clock source can be chosen to
be active on the rising or falling edge. The clock source f
f
T0ON: TM0 Counter On/Off Control
This bit controls the overall on/off function of the TM. Setting the bit high enables the counter to
run, clearing the bit disables the TM. Clearing this bit to zero will stop the counter from counting
and turn off the TM which will reduce its power consumption. When the bit changes state from
low to high the internal counter value will be reset to zero, however when the bit changes from
high to low, the internal counter will retain its residual value.
If the TM is in the Compare Match Output Mode then the TM output pin will be reset to its initial
condition, as specified by the T0OC bit, when the T0ON bit changes from low to high.
T0RP2~T0RP0: TM0 CCRP 3-bit register, compared with the TM0 Counter bit 9~bit 7
Comparator P Match Period
TBC
R/W
0: run
1: pause
000: f
001: f
010: f
011: f
100: f
101: Reserved
110: TCK0 rising edge clock
111: TCK0 falling edge clock
0: Off
1: On
000: 1024 TM0 clocks
001: 128 TM0 clocks
010: 256 TM0 clocks
011: 384 TM0 clocks
100: 512 TM0 clocks
101: 640 TM0 clocks
110: 768 TM0 clocks
111: 896 TM0 clocks
¾
¾
¾
7
7
0
are other internal clocks, the details of which can be found in the oscillator section.
H
SYS
SYS
H
TBC
/64
/16
/4
T0CK2
R/W
¾
¾
¾
6
6
0
T0CK1
R/W
¾
¾
¾
5
5
0
T0CK0
HT66F03/HT66F04/HT68F03/HT68F04
57
R/W
¾
¾
¾
4
4
0
T0ON
R/W
¾
¾
¾
3
3
0
SYS
is the system clock, while f
T0RP2
R/W
¾
¾
¾
2
2
0
T0RP1
R/W
R/W
D9
1
0
1
0
April 16, 2010
www.DataSheet4U.com
H
T0RP0
R/W
R/W
and
D8
0
0
0
0
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