IDT72V3670L10PF IDT, Integrated Device Technology Inc, IDT72V3670L10PF Datasheet - Page 36

IC FIFO SYNC II 36BIT 128-TQFP

IDT72V3670L10PF

Manufacturer Part Number
IDT72V3670L10PF
Description
IC FIFO SYNC II 36BIT 128-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Vr
Datasheet

Specifications of IDT72V3670L10PF

Function
Asynchronous, Synchronous
Memory Size
288K (8K x 36)
Data Rate
166MHz
Access Time
10ns
Voltage - Supply
3.15 V ~ 3.45 V
Operating Temperature
-40°C ~ 80°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Configuration
Dual
Density
288Kb
Access Time (max)
6.5ns
Word Size
36b
Organization
8Kx36
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Package Type
TQFP
Clock Freq (max)
100MHz
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.15V
Operating Supply Voltage (max)
3.45V
Supply Current
40mA
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72V3670L10PF
800-1536

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT72V3670L10PF
Manufacturer:
IDT
Quantity:
11
Part Number:
IDT72V3670L10PF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT72V3670L10PF8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT72V3670L10PFG
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
NOTES:
1. n = PAE offset.
2. For IDT Standard Mode.
3. For FWFT Mode.
4. PAE is asserted LOW on RCLK transition and reset to HIGH on WCLK transition.
5. Select this mode by setting PFM LOW during Master Reset.
NOTES:
1. In IDT Standard mode: D = maximum FIFO depth. D = 1,024 for the IDT72V3640, 2,048 for the IDT72V3650, 4,096 for the IDT72V3660, 8,192 for the IDT72V3670, 16,384 for the
2. In FWFT mode: D = maximum FIFO depth. D = 1,025 for the IDT72V3640, 2,049 for the IDT72V3650, 4,097 for the IDT72V3660, 8,193 for the IDT72V3670, 16,385 for the IDT72V3680
WCLK
WCLK
IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II
1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36
RCLK
RCLK
WEN
WEN
REN
REN
IDT72V3680 and 32,768 for the IDT72V3690.
and 32,769 for the IDT72V3690.
PAE
HF
Figure 21. Asynchronous Programmable Almost-Empty Flag Timing (IDT Standard and FWFT Modes)
[
D-1
n + 1 words in FIFO
2
t
D/2 words in FIFO
Figure 22. Half-Full Flag Timing (IDT Standard and FWFT Modes)
CLKH
n words in FIFO
+ 1
]
words in FIFO
t
CLKH
(1)
,
(2) ,
(2)
(3)
t
t
ENS
ENS
t
CLKL
TM
t
CLKL
36
36-BIT FIFO
t
t
ENH
ENH
t
PAEA
t
HF
t
ENS
t
ENS
[
D/2 + 1 words in FIFO
D-1
n + 1 words in FIFO
n + 2 words in FIFO
2
+ 2
]
words in FIFO
t
t
PAEA
HF
COMMERCIAL AND INDUSTRIAL
(1)
(2) ,
(3)
,
(2)
TEMPERATURE RANGES
[
n + 1 words in FIFO
D-1
2
n words in FIFO
D/2 words in FIFO
+ 1
OCTOBER 22, 2008
]
words in FIFO
4667 drw27
4667 drw26
(1)
(2) ,
,
(3)
(2)

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