MC72000 Freescale Semiconductor, MC72000 Datasheet - Page 94

• Manufacturer Part Number: MC72000
• Description: Integrated Bluetooth Radio
• Manufacturer: Freescale Semiconductor

RESET:
W
Hardware Functional Description
RIE—Receive Interrupt Enable
TIE—Transmit Interrupt Enable
94
R
This control bit allows interrupting the program controller. When the RIE and RE bit are set, the
program controller is interrupted when the SSI receives data. As shown in Table 42, the interrupt trigger
depends on whether the receive FIFO is enabled or not.
If the receive FIFO is disabled:
If the receive FIFO is enabled:
Two receive data interrupts with separate interrupt vectors are available: receive data with exception
status, and receive data without exception. Table 42 shows these vectors and the conditions under which
these interrupts are generated.
This control bit allows interrupting the program controller. When the TIE and TE bits are set, the
program controller is interrupted when the SSI needs more transmit data. As shown in Table 43, the
interrupt trigger depends on whether the transmit FIFIO is enabled or not.
If the transmit FIFO is disabled:
RIE
1 = An interrupt is generated when the RDR flag (in the SCSR) is set
0 = No interrupt is generated
1 = An interrupt is generated when the RFF flag (in the SCSR) is set
0 = No interrupt is generated
1 = An interrupt is generated when the TDE flag (in the SCSR) is set
0 = No interrupt is generated
15
0
One value can be read from the SRX register. Reading the SRX register clears the RDR bit, thus
clearing the interrupt
A maximum of eight values are available to be read from the SRX register. Reading the SRX
register to remove data from the receive FIFO such that the level falls below the watermark
clears the RFF bit, thus clearing the interrupt.
One value can be written to the STX register when this interrupt occurs.
Receive Data with Exception Status
Receive Data (without exception)
TIE
1.See Table 37 for a complete list of interrupts.
14
= Unimplemented or Reserved
0
RE
13
0
Interrupt
TE
12
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0
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MC72000 Advance Information Data Sheet
Table 42. SSI Receive Data Interrupts
RFEN TFEN
11
Figure 61. SCR2 Register Diagram
0
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10
0
RXDI
Base + 0x06
R
Preliminary
9
0
RIE
TXDI
1
1
R
8
0
SYN
RFEN = 0
7
0
RDR = 1
RDR = 1
Selection Control
TSH-
FD
6
0
TSCK
1
RFEN = 1
P
5
0
RFF = 1
RFF = 1
SS-
IEN
4
0
NET
3
0
ROE
0
1
TFSI TFSL TEFS
MOTOROLA
2
0
1
0
0
0