MC72000 Freescale Semiconductor, MC72000 Datasheet - Page 108

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MC72000

Manufacturer Part Number
MC72000
Description
Integrated Bluetooth Radio
Manufacturer
Freescale Semiconductor
Datasheet
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7 Repeat at step 1 on the next frame sync
1.See the description of the ROE bit in Section 7.4.5.2.8, “SSI Control/Status Register (SCSR)” for a description of what
2.The frame sync must not occur earlier than what is configured in the SRXCR as documented in Section 7.4.5.2.7, “SSI
RDR status bit/interrupt
Hardware Functional Description
Leading edge of frame sync occurs on the
SRFS pin
Falling edge of receive clock occurs on the
SRCK pin and the next bit of data is shifted into
the RXSR register
When WL bits (see Section 7.4.5.2.7, “SSI
Transmit and Receive Control Registers
(STXCR, SRXCR)”) have been received RXSR
contents are transferred to the SRX register on
the next falling edge of the receive clock
Note: The SRX register is actually loaded during
the middle of the last receive bit.
Flag status update
If the RIE bit is set, enabling receive interrupts,
then:
(Other options for processing the data transfer
is either polling or DMA transfers.)
Receive over-run (setting the ROE bit of the
SCSR register) is prevented by
happens when the ROE bit is set.
Transmit and Receive Control Registers (STXCR, SRXCR).”
108
Continuous SRCK
Valid
RXSR register
Figure 72. Normal Mode Receive Timing—Continuous Clock (WL=8-bit words, DC=1)
SRX register
SRXD
SRFS
Step
Invalid
1
2
Freescale Semiconductor, Inc.
1
:
Table 53. Normal Mode Receive Operations
For More Information On This Product,
MC72000 Advance Information Data Sheet
2
Go to: www.freescale.com
The RDR bit is set
Receive interrupt occurs
when RDR set
Data is read from the SRX
before the RXSR tries to
write new transmit data at
the next frame sync
Indefinite transition depends on SW interrupt processing
Preliminary
3
RXFIFO Disabled
4
(See Figure 72)
The RFF bit is set if the level of data in the
RXFIFO rises above the watermark level
Receive interrupt occurs when RFF set
Data is read from the SRX before the
RXSR tries to provide more data to a full
RXFIFO (it can take several frame times
to fill the RXFIFO)
(No Figure Available
RXFIFO Enabled
MOTOROLA

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