TDF8599 NXP Semiconductors, TDF8599 Datasheet - Page 51

• Manufacturer Part Number: TDF8599
• Description: I2C-bus controlled dual channel 43 W/2 W single channel 85 W/1 W class-D power amplifier
• Manufacturer: NXP Semiconductors

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NXP Semiconductors
22. Tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10. Overview of TDF8599 protection circuits and
Table 11. Available data at DIAG and CLIP pin . . . . . . . .18
Table 12. Interpretation of DC load detection bits . . . . . .20
Table 13. TDF8599 address using an external resistor . .23
23. Figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Fig 9.
Fig 10. AD/BD modulation switching circuit . . . . . . . . . . .12
Fig 11. AD modulation . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Fig 12. BD modulation . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Fig 13. Master and slave operation with
Fig 14. Mono and Parallel modes . . . . . . . . . . . . . . . . . .14
Fig 15. DC offset protection and diagnostic output . . . . .16
Fig 16. Diagnostic output for short circuit conditions . . . .18
Fig 17. DC load detection circuit . . . . . . . . . . . . . . . . . . .19
Fig 18. DC load detection procedure . . . . . . . . . . . . . . . .19
Fig 19. DC load detection limits . . . . . . . . . . . . . . . . . . . .19
Fig 20. Recommended start-up sequence with DC load
Fig 21. Start-up and shutdown timing in I
Fig 22. Start-up and shutdown timing in non-I
Fig 23. I
Fig 24. Data bits sent from Master microprocessor
Fig 25. I
Fig 26. I
Fig 27. P
Fig 28. P
Fig 29. P
TDF8599_1
Product data sheet
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Heatsink up (top view) pin configuration
TDF8599TH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Heatsink down (top view) pin configuration
TDF8599TD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Mode selection. . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Oscillator frequency as function of R
Master and slave configuration . . . . . . . . . . . . . . .9
Spread spectrum mode . . . . . . . . . . . . . . . . . . . .10
Spread spectrum operation in Master mode . . . .10
Phase lock operation . . . . . . . . . . . . . . . . . . . . . .11
detection enabled. . . . . . . . . . . . . . . . . . . . . . . . .21
with DC load detection . . . . . . . . . . . . . . . . . . . . .22
mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
(Mmp). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
THD = 0.5 % . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
THD = 10 % . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
THD = 0.5 % . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
2
2
2
o
o
o
C-bus start and stop conditions. . . . . . . . . . . . .24
C-bus write . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
C-bus read. . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Quick reference data . . . . . . . . . . . . . . . . . . . . .2
Ordering information . . . . . . . . . . . . . . . . . . . . .2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .5
I
Non-I
Mode setting OSCIO . . . . . . . . . . . . . . . . . . . . .8
Oscillator modes . . . . . . . . . . . . . . . . . . . . . . .11
Operation mode selection with the MOD pin . .12
Overview of protection types . . . . . . . . . . . . . .15
amplifier states . . . . . . . . . . . . . . . . . . . . . . . . .17
2
as a function of V
as a function of V
as a function of V
C-bus mode operation . . . . . . . . . . . . . . . . . . .8
2
C-bus mode operation . . . . . . . . . . . . . . .8
p
p
p
in stereo mode with
in stereo mode with
in parallel mode with
1
2
2
C-bus mode
p phase shift.14
osc
2
C-bus
. . . . . . . . .9
Rev. 01 — 13 November 2008
Table 14. Instruction byte descriptions . . . . . . . . . . . . . . 25
Table 15. Frequency bit settings . . . . . . . . . . . . . . . . . . . 25
Table 16. Description of data bytes . . . . . . . . . . . . . . . . . 26
Table 17. Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 18. Thermal characteristics . . . . . . . . . . . . . . . . . . 27
Table 19. Static characteristics . . . . . . . . . . . . . . . . . . . . 28
Table 20. Switching characteristics . . . . . . . . . . . . . . . . . 31
Table 21. Dynamic characteristics . . . . . . . . . . . . . . . . . 32
Table 22. Filter components values . . . . . . . . . . . . . . . . 36
Table 23. SnPb eutectic process (from J-STD-020C) . . . 47
Table 24. Lead-free process (from J-STD-020C) . . . . . . 47
Table 25. Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 26. Revision history . . . . . . . . . . . . . . . . . . . . . . . . 49
Fig 30. P
Fig 31. THD + N as a function of output power . . . . . . . . 37
Fig 32. THD + N as a function of output power . . . . . . . . 37
Fig 33. THD + N as a function of frequency with
Fig 34. THD + N as a function of frequency with
Fig 35. Channel separation as a function of
Fig 36. Channel separation as a function of
Fig 37. CMRR as a function of frequency . . . . . . . . . . . . 39
Fig 38. Gain as a function of frequency. . . . . . . . . . . . . . 39
Fig 39. Efficiency as a function of P
Fig 40. Power dissipation as a function of total
Fig 41. Example application diagram for dual BTL in
Fig 42. Example application diagram for dual BTL
Fig 43. Example application diagram for a single BTL
Fig 44. Master-slave example application diagram;
Fig 45. Package outline SOT851-2 (HSOP36) . . . . . . . . 44
Fig 46. Package outline SOT938-1 (HSOP36) . . . . . . . . 45
Fig 47. Temperature profiles for large and small
Class-D power amplifier with load diagnostics
THD = 10 %. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
a 2 W load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
a 4 W load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
frequency with a 2 W load . . . . . . . . . . . . . . . . . . 38
frequency with a 4 W load . . . . . . . . . . . . . . . . . . 38
output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
non-I
in I
in I
one BTL master and two BTL slaves in I
mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
components. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
o
as a function of V
2
2
C-bus mode. . . . . . . . . . . . . . . . . . . . . . . . . . 41
C-bus mode. . . . . . . . . . . . . . . . . . . . . . . . . . 42
2
C-bus mode . . . . . . . . . . . . . . . . . . . . . . . . 40
p
parallel mode with
o
. . . . . . . . . . . . . . . . 39
TDF8599
© NXP B.V. 2008. All rights reserved.
2
C-bus
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