TDF8599 NXP Semiconductors, TDF8599 Datasheet - Page 33

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TDF8599

Manufacturer Part Number
TDF8599
Description
I2C-bus controlled dual channel 43 W/2 W single channel 85 W/1 W class-D power amplifier
Manufacturer
NXP Semiconductors
Datasheet

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14. Application information
TDF8599_1
Product data sheet
B = 22 Hz to 20 kHz, AES brick wall, R
B = 22 Hz to 20 kHz, AES brick wall, independent of R
V
i
= V
i(max)
= 0.5 V RMS.
14.1 Output power estimation (Stereo mode)
The output power, just before clipping, can be estimated using the following equations:
Where,
The output power at 10 % THD can be estimated by:
P
Figure 27
THD = 10 % as a function of supply voltage for different load impedances at stereo mode.
P
o(1)
o
=
P
V
R
R
R
t
f
W(min)
osc
= 0.5 % and P
o
P
L
DSon
S
---------------------------------------------------------------------------------------------------------------------------------------- -
= 0.5 %
= supply voltage (V)
= load impedance ( )
= series resistance output inductor ( )
= oscillator frequency in Hz (typically 320 kHz)
----------------------------------------------------- -
R
L
and
= on-resistance power switch ( )
= minimum pulse width(s) depending on output current
+
s
2
= 0 .
Figure 28
R
R
L
DSon
o(2)
Rev. 01 — 13 November 2008
= 10 %.
+
show the estimated output power at THD = 0.5 % and
s
.
R
S
2
R
1 t
L
W min
Class-D power amplifier with load diagnostics
--------- -
f
osc
2
V
P
p
0 2
2
=
1.25 P
o 1
TDF8599
© NXP B.V. 2008. All rights reserved.
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