TDF8599 NXP Semiconductors, TDF8599 Datasheet - Page 22

• Manufacturer Part Number: TDF8599
• Description: I2C-bus controlled dual channel 43 W/2 W single channel 85 W/1 W class-D power amplifier
• Manufacturer: NXP Semiconductors

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NXP Semiconductors
TDF8599_1
Product data sheet
Fig 21. Start-up and shutdown timing in I
IB1[D0] and
SEL_MUTE
IB2[D0]=0
(1) Shutdown hold delay
(2) Master mode shutdown delay
(3) Shutdown delay
ACGND
V
DIAG
OUT
SVR
DDA
EN
8.6.3 Start-up and shutdown sequence
In Parallel mode, disabling clip detection on both channels requires both bits to be set to
bit IB1[D5] = 1 and bit IB2[D5] = 1.
To prevent the switch on or switch off ‘pop noise’, a capacitor (C
is used to smooth start-up and shutdown. During start-up and shutdown, the output
voltage tracks the voltage on pin SVR. Increasing C
shutdown time. Enhanced pop performance is achieved by muting the amplifier until the
SVR voltage reaches its final value and the outputs start switching. The capacitor on the
pin SEL_MUTE (C
SEL_MUTE determines the amplifier gain. Increasing C
mute times. In addition, a larger C
When the amplifier is switched off with an I
amplifier is first muted and then capacitor (C
In Slave mode, the device enters the off state immediately after capacitor (C
discharged. In Master mode, the clock is kept active by an additional delay (t
approximately 50 ms to allow slave devices to enter off state.
When an external clock is connected to pin OSCIO (in Slave mode), the clock remains
active during the shutdown sequence (t
are able to enter the off state.
t
wake
t
d(stb-mute)
t
det(DCload)
ON
2
C-bus mode with DC load detection
Rev. 01 — 13 November 2008
) determines the unmute and mute timing. The voltage on pin
mute on delay
ON
value increases the DC load detection cycle.
d
Class-D power amplifier with load diagnostics
(1)
t
d
(3)
) to ensure that the slaved TDF8599 devices
2
C-bus command or by pulling pin EN low, the
SVR
) is discharged.
SVR
results in a longer start-up and
ON
increases the unmute and
SVR
) connected to pin SVR
TDF8599
© NXP B.V. 2008. All rights reserved.
t
d
(1)
t
SVR
d
d
(2)
(2)
) of
001aai790
) is
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