GS1503B Gennum Corporation, GS1503B Datasheet - Page 43

• Manufacturer Part Number: GS1503B
• Description: Hd Embedded Audio Codec
• Manufacturer: Gennum Corporation

4.11.1 Arbitrary Data Multiplexing In External Pin Mode
PKTENO
PKT[7:0]
Arbitrary
PKTEN
Packet
VCLK
2 CLKs
This is the default mode for multiplexing arbitrary data packets. The GS1503B will
set the PKTENO external pin HIGH when arbitrary data can be input to the device.
Two VCLK cycles after PKTENO goes HIGH, the user should set the PKTEN
arbitrary packet enable pin HIGH. Two VCLK cycles after PKTEN is set HIGH,
arbitrary data can be input at the PKT[7:0] bus. See
The user is required to enter the following arbitrary data: Data ID (DID), Secondary
Data ID (SDID), Data Count (DC) and User Data Words (UDW: maximum of 255),
via the PKT[7-0] pins. This GS1503B automatically generates the Ancillary Data
Flag (ADF), Checksum (CS) and bit 8 (Parity Bit) and bit 9 (Not bit 8).
The PKTENO pin will be set HIGH on all video lines except the two lines following
the video switching point. For example, with the default setting of line 7 field 1,
PKTENO will not be set HIGH on lines 8 and 9. The switching point is set in the
SW_LNA[12:0] and SW_LNB[12:0] Host Interface registers for field 1 and field 2
respectively. See
Figure 4-22: Arbitrary Data Packet Input Timing Diagram
Proprietary and Confidential
Y/C
Arbitrary Data Packet Timing
Arbitrary Data Input Enable
Arbitrary Data
2 CLKs
b
/ C
r
[19:0]
Video Switching Line Setting on page
37953 - 0
Automatically generated by the GS1503B
VIN[19:0]
PKTENO
PKTEN
PKT[7:0]
GS1503B
Arbitrary Data
August 2006
Figure 4-22
GS1503B Data Sheet
36.
2 CLKs
for timing.
2 CLKs
43 of 88