74F114 Fairchild Semiconductor, 74F114 Datasheet - Page 2

• Manufacturer Part Number: 74F114
• Description: Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears
• Manufacturer: Fairchild Semiconductor

www.fairchildsemi.com
Unit Loading/Fan Out
Truth Table
H (h)
L (h)

X
Q
Lower case letters indicate the state of the referenced input or output one setup time prior to the HIGH-to-LOW clock transition.
Logic Diagram
(one half shown)
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
0
(Q
Immaterial
HIGH-to-LOW Clock Transition
0
)
LOW Voltage Level
HIGH Voltage Level
Before HIGH-to-LOW Transition of Clock
J
CP
C
S
Q
1
D1
D
1
, J
Pin Names
, Q
, S
2
, K
2
D2
, Q
1
, K
1
, Q
2
2
Data Inputs
Clock Pulse Input (Active Falling Edge)
Direct Clear Input (Active LOW)
Direct Set Inputs (Active LOW)
Outputs
S
H
H
H
H
H
L
L
D
C
H
H
H
H
H
L
L
D
Description
Inputs
CP




X
X
X
X
X
X
J
h
h
2
l
l
K
X
X
X
h
h
l
l
HIGH/LOW
Q
Q
Q
H
H
H
L
L
Outputs
1.0/10.0
50/33.3
0
0
1.0/1.0
1.0/8.0
1.0/5.0
U.L.
Q
Q
Q
H
H
H
L
L
0
0
Output I
20 A/ 0.6 mA
20 A/ 4.8 mA
20 A/ 6.0 mA
20 A/ 3.0 mA
Input I
1 mA/20 mA
IH
OH
/I
/I
IL
OL