ISLA112P50 Intersil, ISLA112P50 Datasheet - Page 30

• Manufacturer Part Number: ISLA112P50
• Description: 500MSPS A/D Converter
• Manufacturer: Intersil

ADDR
(Hex)
56-5F
65-6F
76-BF
55
60
61
62
63
64
70
71
72
73
74
75
output_mode_A
output_mode_B
Fine Offset Init
PARAMETER
Coarse Offset
Fine Gain Init
config_status
Medium Gain
Sample Time
I2E AC RMS
phase_slip
Hysteresis
Skew Init
skew_diff
reserved
reserved
reserved
NAME
Init
Init
30
(MSB)
BIT 7
other codes = reserved
Output Mode [2:0]
000 = Pin Control
001 = LVDS 2mA
010 = LVDS 3mA
100 = LVCMOS
1 = slow
clock_divide
0 = fast
Range
BIT 6
Result
XOR
DLL
TABLE 17. SPI MEMORY MAP (Continued)
Sample Time Skew Initialization value
BIT 5
Coarse Offset Initialization value
Medium Gain Initialization value
Fine Offset Initialization value
Fine Gain Initialization value
ISLA112P50
AC RMS Power Hysteresis
Reserved
Differential Skew
BIT 4
Reserved
Reserved
Reserved
BIT 3
001 = Twos Complement
Other codes = Reserved
Other codes = Reserved
BIT 2
Output Format [2:0]
Clock Divide [2:0]
100 = Offset Binary
000 = Pin Control
001 = divide by 1
010 = divide by 2
100 = divide by 4
000 = Pin Control
010 = Gray Code
BIT 1
(LSB)
BIT 0
Clock
Edge
Next
Soft Reset
Soft Reset
Read Only
affected
affected
affected
VALUE
www.DataSheet4U.com
(Hex)
Reset
DEF.
NOT
NOT
NOT
Soft
10h
80h
80h
80h
80h
80h
80h
00h
00h
00h
00h
by
by
by
March 30, 2010
INDEXED
/GLOBAL
FN7604.0
G
G
G
G
G
G
G
G
G
G
G
G
G
G