ISL6556A Intersil Corporation, ISL6556A Datasheet - Page 11

• Manufacturer Part Number: ISL6556A
• Description: Optimized Multi-Phase PWM Controller with 6-Bit DAC for VR10.X Application
• Manufacturer: Intersil Corporation

sample currents are summed and divided by the number of
active channels. The resulting average current, I
provides a measure of the total load current demand on the
converter and the appropriate level of channel current. Using
Figures 3 and 4, the average current is defined as
where N is the number of active channels and I
total load current.
The average current is subtracted from the individual
channel sample currents. The resulting error current, I
filtered to modify V
compared to a sawtooth ramp signal to produce a modified
pulse width which corrects for any unbalance and drives the
error current toward zero. Figure 4 illustrates Intersil’s
patented current-balance method as implemented on
channel-1 of a multi-phase converter.
Two considerations designers face are MOSFET selection
and inductor design. Both are significantly improved when
channel currents track at any load level. The need for
complex drive schemes for multiple MOSFETs, exotic
magnetic materials, and expensive heat sinks is avoided,
resulting in a cost-effective and easy-to-implement solution
relative to single-phase conversion. Channel-current
balance insures that the thermal advantage of multi-phase
conversion is realized. Heat dissipation in multiple channels
is spread over a greater area than can easily be
accomplished using the single phase approach.
In some circumstances, it may be necessary to deliberately
design some channel-current unbalance into the system. In
a highly compact design, one or two channels may be able
to cool more effectively than the other(s) due to nearby air
flow or heat sinking components. The other channel(s) may
have more difficulty cooling with comparatively less air flow
and heat sinking. The hotter channels may also be located
I
I
AVG
AVG
V
FIGURE 4. CHANNEL-1 PWM FUNCTION AND CURRENT-
COMP
=
=
I
----------------------------------------
I
-------------
1
OUT
N
+
I
2
NOTE: *Channels 3 and 4 are optional.
BALANCE ADJUSTMENT
r
----------------------
+
N
DS ON
R
+
I
ER
ISEN
-
+
f(j )
I
+
1
COMP
I
N
-
I
AVG
SAWTOOTH SIGNAL
. The modified V
11
N
+
-
COMP
OUT
signal is
AVG
is the
PWM1
I
I
I
(EQ. 4)
,
4
3
2
ER
*
*
, is
ISL6556A
close to other heat-generating components tending to drive
their temperature even higher. In these cases, the proper
selection of the current sense resistors (R
introduces channel current unbalance into the system.
Increasing the value of R
decreasing it in the hotter channels moves all channels into
thermal balance at the expense of current balance.
Voltage Regulation
The integrating compensation network shown in Figure 5
assures that the steady-state error in the output voltage is
limited only to the error in the reference voltage (output of
the DAC) and offset errors in the OFS current source,
remote-sense and error amplifiers. Intersil specifies the
guaranteed tolerance of the ISL6556A to include the
combined tolerances of each of these elements.
The output of the error amplifier, V
sawtooth waveform to generate the PWM signals. The PWM
signals control the timing of the Intersil MOSFET drivers and
regulate the converter output to the specified reference
voltage. The internal and external circuitry that controls
voltage regulation is illustrated in Figure 5.
The ISL6556A incorporates an internal differential remote-
sense amplifier in the feedback path. The amplifier removes
the voltage error encountered when measuring the output
voltage relative to the local controller ground reference point
resulting in a more accurate means of sensing output
voltage. Connect the microprocessor sense pins to the non-
inverting input, VSEN, and inverting input, RGND, of the
remote-sense amplifier. The remote-sense output, V
connected to the inverting input of the error amplifier through
an external resistor.
FIGURE 5. OUTPUT VOLTAGE AND LOAD-LINE
R
FB
EXTERNAL CIRCUIT
V
V
OUT
OUT
+
-
V
DROOP
C
R
REF
+
-
C
REGULATION WITH OFFSET ADUJUSTMENT
R
C
REF
C
RGND
COMP
VDIFF
VSEN
DAC
REF
FB
ISEN
in the cooler channels and
ISL6556A INTERNAL CIRCUIT
COMP
I
AVG
ERROR AMPLIFIER
DIFFERENTIAL
REMOTE-SENSE
AMPLIFIER
+
, is compared to the
-
+
ISEN
-
in Figure 3)
V
COMP
DIFF
, is