BR24L01 Rohm, BR24L01 Datasheet - Page 18

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BR24L01

Manufacturer Part Number
BR24L01
Description
1288 bit electrically erasable PROM
Manufacturer
Rohm
Datasheet

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Memory ICs
6) I / O circuit
LV
Pull up resister of SDA pin
Maximum of R
LV
(Typ.=1.2V), write operation is inhibited.
The pull up resister is needed because SDA is NMOS open drain. Decide the value of this resister (R
by considering V
If large R
Maximum of R
CC
When SDA bus is HIGH, the voltage A of SDA bus determined by a total input leak (I
CC
SDA rise time determined by R
And the other timing must keep the conditions of AC spec.
connected to the bus and R
including noise margin 0.2 V
circuit
circuit inhibit write operation at low voltage, and prevent an inadvertent write. Below the LV
V
Examples : When V
CC
R
PU
PU
is chosen, clock frequency need to be slow. In case of small R
I
L
R
PU
PU
0.8V
PU
IL
is determined by following factor.
, I
According to 2
R
CC
L
PU
0.2V
IL
characteristics of a controller which control the device and V
V
CC
300 [k ]
0.8 3 0.7 3
IH
CC
10 10
V
3V I
BR24L01A-W / BR24L01AF-W / BR24L01AFJ-W /
IH
CC
PU
.
L
PU
6
must be enough higher than input HIGH level of a controller and the device,
10 A V
and the capacitance of bus line (CBUS) must be less than T
IH
0.7V
CC
BR24L01AFV-W / BR24L01AFVM-W
MICRO
COMPUTER
IL
PU
, the operating current increases.
R
PU
OH
THE CAPACITANCE OF
BUS LINE (CBUS)
A
, I
IL
OL
characteristics of the device.
L
BR24LXX
) of the all devices
SDA PIN
CC
R
.
voltage
PU
) properly,
18/25

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