PIC18LF13K22 Microchip Technology, PIC18LF13K22 Datasheet - Page 7

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PIC18LF13K22

Manufacturer Part Number
PIC18LF13K22
Description
(PIC18F1xK22) Flash Microcontrollers
Manufacturer
Microchip Technology
Datasheet

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3.1
Figure 3-4 shows the high-level overview of the
programming process. First, a Bulk Erase is performed.
Next, the code memory, ID locations and data
EEPROM are programmed. These memories are then
verified to ensure that programming was successful. If
no errors are detected, the Configuration bits are then
programmed and verified.
FIGURE 3-4:
© 2008 Microchip Technology Inc.
High-Level Overview of the
Programming Process
Program Data EE
Configuration Bits
Program Memory
Configuration Bits
Verify Program
Perform Bulk
Program IDs
Verify Data
Verify IDs
Program
HIGH-LEVEL
PROGRAMMING FLOW
Erase
Verify
Done
Start
Advance Information
PIC18F1XK22/LF1XK22
3.2
As shown in Figure 3-6, the High-Voltage ICSP
Program/Verify mode is entered by holding PGC and
PGD low and then raising MCLR/V
(high voltage). Once in this mode, the code memory,
data EEPROM, ID locations and Configuration bits can
be accessed and programmed in serial fashion.
Figure 3-7 shows the exit sequence.
The sequence that enters the device into the Program/
Verify mode places all unused I/Os in the high-impedance
state.
FIGURE 3-5:
FIGURE 3-6:
MCLR/V
V
PGD
PGC
MCLR/V
V
PGD
PGC
Note:
DD
DD
Entering and Exiting High-Voltage
ICSP Program/Verify Mode
D110
D110
PP
PP
/RA3
/RA3
P1
This method of entry is valid, regardless
of Configuration Word selected.
PGD = Input
PGD = Input
P13
V
VERIFY MODE ENTRY
V
VERIFY MODE ENTRY
P1
PP
DD
P13
-FIRST PROGRAM/
-FIRST PROGRAM/
P12
P12
DS41357A-page 7
PP
/RA3 to V
IHH

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