PIC18LF13K22 Microchip Technology, PIC18LF13K22 Datasheet - Page 25

• Manufacturer Part Number: PIC18LF13K22
• Description: (PIC18F1xK22) Flash Microcontrollers
• Manufacturer: Microchip Technology

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FIGURE 5-4:
FIGURE 5-5:
5.5
A data EEPROM address may be read via a sequence
of core instructions (4-bit command, ‘0000’) and then
output on PGD via the 4-bit command, ‘0010’ (TABLAT
register). The result may then be immediately
compared to the appropriate data in the programmer’s
memory for verification. Refer to Section 5.4 “Read
Data EEPROM Memory” for implementation details of
reading data EEPROM.
© 2008 Microchip Technology Inc.
PGC
PGD
Note 1:
PGC
PGD
Verify Data EEPROM
1
0
2
1
Magnification of the high-impedance delay between PGC and PGD is shown in Figure 5-5.
MSb
3
0
4
0
SHIFT OUT DATA HOLDING REGISTER TIMING DIAGRAM (0010)
HIGH-IMPEDANCE DELAY
P5
PGD = Input
1
1
n
P19
2
P3
3
2
4
n
5
Advance Information
6
7
8
PIC18F1XK22/LF1XK22
P6
LSb
9
P14
5.6
The term “Blank Check” means to verify that the device
has no programmed memory cells. All memories must
be verified: code memory, data EEPROM, ID locations
and Configuration bits. The device ID registers
(3FFFFEh:3FFFFFh) should be ignored.
A “blank” or “erased” memory cell will read as a ‘1’.
Therefore, Blank Checking a device merely means to
verify that all bytes read as FFh except the Configura-
tion bits. Unused (reserved) Configuration bits will read
‘0’ (programmed). Refer to Table 6-1 for blank configu-
ration expect data for the various PIC18F1XK22/
LF1XK22 devices.
Given that Blank Checking is merely code and data
EEPROM verification with FFh expect data, refer to
Section 5.4 “Read Data EEPROM Memory” and
Section 5.2 “Verify Code Memory and ID Locations”
for implementation details.
FIGURE 5-6:
10 11
1
2
PGD = Output
12
Shift Data Out
Blank Check
3
Blank Check Device
13
4
14
device
Abort
blank?
5
Start
Is
15 16
No
6
BLANK CHECK FLOW
MSb
P5A
(Note 1)
(Note 1)
Fetch Next 4-bit Command
Yes
1
n
PGD = Input
2
n
DS41357A-page 25
3
Continue
n
4
n