PIC18LF13K22 Microchip Technology, PIC18LF13K22 Datasheet - Page 22

• Manufacturer Part Number: PIC18LF13K22
• Description: (PIC18F1xK22) Flash Microcontrollers
• Manufacturer: Microchip Technology

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PIC18F1XK22/LF1XK22
5.0
5.1
Code memory is accessed one byte at a time via the
4-bit command, ‘1001’ (table read, post-increment).
The contents of memory pointed to by the Table Pointer
(TBLPTRU:TBLPTRH:TBLPTRL) are serially output on
PGD.
TABLE 5-1:
FIGURE 5-1:
DS41357A-page 22
Step 1: Set Table Pointer
0000
0000
0000
0000
0000
0000
Step 2: Read memory and then shift out on PGD, LSb to MSb
1001
PGC
Command
PGD
Note 1:
4-bit
READING THE DEVICE
Read Code Memory, ID Locations
and Configuration Bits
Magnification of the high-impedance delay between PGC and PGD is shown in Figure 5-6.
1
1
READ CODE MEMORY SEQUENCE
2
0
0E <Addr[21:16]>
0E <Addr[15:8]>
0E <Addr[7:0]>
Data Payload
3
TABLE READ POST-INCREMENT INSTRUCTION TIMING DIAGRAM (1001)
0
4
6E F8
6E F7
6E F6
00 00
1
P5
PGD = Input
1
2
3
MOVLW Addr[21:16]
MOVWF TBLPTRU
MOVLW <Addr[15:8]>
MOVWF TBLPTRH
MOVLW <Addr[7:0]>
MOVWF TBLPTRL
TBLRD *+
4
Advance Information
5
6
7
8
P6
The 4-bit command is shifted in LSb first. The read is
executed during the next 8 clocks, then shifted out on
PGD during the last 8 clocks, LSb to MSb. A delay of
P6 must be introduced after the falling edge of the 8th
PGC of the operand to allow PGD to transition from an
input to an output. During this time, PGC must be held
low (see Figure 5-1). This operation also increments
the Table Pointer by one, pointing to the next byte in
code memory for the next read.
This technique will work to read any memory in the
000000h to 3FFFFFh address space, so it also applies
to the reading of the ID and Configuration registers.
9
LSb
P14
10
1
Core Instruction
11
2
PGD = Output
12
Shift Data Out
3
13
4
14
5
15
© 2008 Microchip Technology Inc.
6
16
MSb
P5A
(Note 1)
Fetch Next 4-bit Command
1
PGD = Input
n
2
n
3
n
4
n