MD2241-D128-V3 M-Systems Inc., MD2241-D128-V3 Datasheet - Page 37

no-image

MD2241-D128-V3

Manufacturer Part Number
MD2241-D128-V3
Description
Diskonchip Dimm Plus
Manufacturer
M-Systems Inc.
Datasheet
10.4 Timing Specifications
10.4.1 Read Cycle Timing
37
1. CE# may be asserted any time before or after OE# is asserted. If CE# is asserted after OE#, all timing relative to when OE# was asserted will
2. CE# may be negated any time before or after OE# is negated. If CE# is negated before OE#, all timing relative to when OE# was negated
3. The boot block is located at addresses 0000~07FFH and 1800H~1FFFH. Registers located at addresses 0800H~17FFH have a faster access
4. Systems that do not access the boot block may implement only the read access timing for “all other registers”. This will increase the systems
be referenced to the time CE# was asserted.
will be referenced to the time CE# was negated.
time than the boot block. Access to the boot block is not required after the boot process has completed.
performance, however it will prevent access to the boot block.
A[12:0], BHE#
T
T
T
T
T
Symbol
SU
HO
T
T
T
HO
REC
Tsu(A)
SU
T
LOZ
HIZ
HO
(CE0)
(CE0)
(CE1)
ACC
(CE1)
D[15:0]
(OE)
(A)
(D)
(D)
WE#
OE#
CE#
1
2
t
HO
(CE1)
Read access time (all other addresses)
CE#
t
SU
Table 10: Read Cycle Timing Definitions
OE# or WE#
OE# negated to start of next cycle
(A)
Address to OE#
OE#
CE#
OE#
Read access time (RAM)
Preliminary Data Sheet, Rev. 1.2
t
SU
t (OE FRE0)
Figure 14: Read Cycle Timing
to WE#
OE#
(CE0)
OE#
t
to OE#
to Address hold time
Description
LOZ
to CE#
t
HO
to D Hi-Z delay
(D)
t
(A)
ACC
to CE#
to D driven
or OE#
setup time
setup time
hold time
hold time
setup time
3,4
t
HO
(CE0)
3
t
HIZ
t
REC
(D)
Min
t
10
28
20
10
SU
(OE)
2.7V - 3.6V
6
6
(CE1)
Max
103
85
25
DiskOnChip DIMM Plus
Units
94-SR-002-08-8L
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

Related parts for MD2241-D128-V3