MD2241-D128-V3 M-Systems Inc., MD2241-D128-V3 Datasheet - Page 26

• Manufacturer Part Number: MD2241-D128-V3
• Description: Diskonchip Dimm Plus
• Manufacturer: M-Systems Inc.

7.5
Description:
Address (hex):
Type:
Reset Value:
7.6
Description:
Address (hex):
Type:
Reset Value:
26
Bit No.
Bit No.
Bit 7
Bit 7
0-7
0-1
5-7
2
3
4
Alias Resolution Register
DiskOnChip Control Register/Control Confirmation Register
RFU_0
D[7:0]: Data bits
Mode. These bits select the mode of operation, as follows:
00: Reset
01: Normal
10: Deep Power-Down
MDWREN (Mode Write Enable). This bit must be set to 1 before changing the mode of operation.
BDET (Boot Detect). This bit is set whenever the device has entered Reset Mode as a result of the
Boot Detector triggering. It is cleared by writing a 1 to this bit.
RST_LAT (Reset Latch). This bit is set whenever the device has entered the Reset Mode as a
result of the RSTIN# input signal being asserted or the internal voltage detector triggering. It is
cleared by writing a 1 to this bit.
Reserved for future use
This register enables software to identify multiple DiskOnChip DIMM Plus devices or multiple
These two registers are identical and contain information on the operation mode of DiskOnChip.
aliases in the CPUs memory space. Data written is stored but does not affect the behavior of
DiskOnChip DIMM Plus.
1004
Read/Write
00H
After writing the required value to the DiskOnChip Control register, the complement of that data
byte must also be written to the Control Confirmation register. The two writes cycles must not be
separated by any other read or write cycles to DiskOnChip DIMM Plus memory space, except for
reads from the Programmable Boot Block space.
1006/1076
Read/Write
10H
Bit 6
Bit 6
RFU_0
Bit 5
Bit 5
Preliminary Data Sheet, Rev. 1.2
RST_LAT
Bit 4
Bit 4
D[7:0]
Description
Description
BDET
Bit 3
Bit 3
MDWREN
Bit 2
Bit 2
Bit 1
Bit 1
DiskOnChip DIMM Plus
Mode[1:0]
94-SR-002-08-8L
Bit 0
Bit 0