MT9040 Zarlink Semiconductor, MT9040 Datasheet - Page 2

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MT9040

Manufacturer Part Number
MT9040
Description
Manufacturer
Zarlink Semiconductor
Datasheet

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MT9040
2
Pin Description
23,31
3,4,5,
38,43
28,35
Pin #
1,10,
7,17
11
12
13
2
6
8
9
Name
OSCo
OSCi
F16o
RSP
RST
REF
V
F0o
V
IC
SS
DD
Advance Information
Ground. 0 Volts. (Vss pads).
Reset (Input). A logic low at this input resets the MT9040. To ensure proper operation, the
device must be reset after reference signal frequency changes and power-up. The RST pin
should be held low for a minimum of 300ns. While the RST pin is low, all frame and clock
outputs are at logic high. Following a reset, the input reference source and output clocks and
frame pulses are phase aligned as shown in Figure 9.
Internal Connection. Leave open circuit.
Reference (Input). This is the input reference source (falling edge) used for synchronization.
One of four possible frequencies (8kHz, 1.544MHz, 2.048MHz or 19.44MHz) may be used.
Positive Supply Voltage. +3.3V
Oscillator Master Clock (CMOS Output). For crystal operation, a 20MHz crystal is
connected from this pin to OSCi, see Figure 6. For clock oscillator operation, this pin is left
unconnected, see Figure 5.
Oscillator Master Clock (CMOS Input). For crystal operation, a 20MHz crystal is connected
from this pin to OSCo, see Figure 6. For clock oscillator operation, this pin is connected to a
clock source, see Figure 5.
Frame Pulse ST-BUS 8.192 Mb/s (CMOS Output). This is an 8kHz 61ns active low framing
pulse, which marks the beginning of an ST-BUS frame. This is typically used for ST-BUS
operation at 8.192 Mb/s. See Figure 10.
Frame Pulse ST-BUS 2.048Mb/s (CMOS Output). This is an 8kHz 244ns active low framing
pulse, which marks the beginning of an ST-BUS frame. This is typically used for ST-BUS
operation at 2.048Mb/s and 4.096Mb/s. See Figure 10.
Receive Sync Pulse (CMOS Output). This is an 8kHz 488ns active high framing pulse, which
marks the beginning of an ST-BUS frame. This is typically used for connection to the Siemens
MUNICH-32 device. See Figure 11.
FLOCK
LOCK
OSCo
C1.5o
C19o
OSCi
F16o
Figure 2 - Pin Connections
REF
RSP
RST
Vdd
C2o
TSP
C4o
V
Vdd
Vss
F0o
F8o
Vss
SS
IC
IC
IC
IC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
MT9040AN
DC
nominal.
Description
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
TMS
TCK
TRST
TDI
TDO
IC
IC
FS1
FS2
IC
IC
IC
MS
Vdd
IC
IC
NC
Vss
IC
IM
Vdd
C6o
C16o
C8o

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