MT90210 Zarlink Semiconductor, MT90210 Datasheet - Page 19

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MT90210

Manufacturer Part Number
MT90210
Description
3072 Channels TDM to Dual Port RAM Multiple Rate Parallel Bus Access Circuit (MRPAC)
Manufacturer
Zarlink Semiconductor
Datasheet
MT90210
AC Electrical Characteristics
timing specifications. The setup/hold and propagation delays are based on a single reference level which is 1.5V for TTL(V
CMOS (V
2-162
Voltage Reference
CT
Clock
Input Data
).
V
V
V
V
V
V
HM
LM
TT
CT
H
L
t
Voltage Value when
Connected to TTL
not applicable
t
Figure 16 - Setup Time and Hold Time
Figure 15 - Input Rise and Fall Times
-
The following table specifies voltage reference levels used in both input timing and output
2.4
2.0
0.8
0.4
1.5
Figure 14 - Input Pulse Width
t
V
V
V
H
TT
L
t
t
Connected to CMOS
Voltage Value when
not applicable
V
V
V
V
0.9*V
0.7*V
0.3*V
0.1*V
0.5*V
V
V
V
V
V
V
H
HM
LM
L
H
TT
L
H
TT
L
DD
DD
DD
DD
DD
t
TT
V
V
V
Units
H
TT
L
) and 0.5*V
V
V
V
V
V
V
DD
for

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