ADAM24P08 ETC, ADAM24P08 Datasheet - Page 27

• Manufacturer Part Number: ADAM24P08
• Description: Remote Control Transmitter
• Manufacturer: ETC

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ADAM24PXX
(14) TM n
(15) BR a
Naming :
Status :
Format :
Operand :
Function :
<Purpose>
Naming :
Status :
Format :
Operand :
Function :
<Purpose>
<Comment>
Test Memory Bit
Comparison results to status
Ⅱ
Bit address 0 ≤ n ≤ 3
M(X,Y,n) ← 1?
ST ← 1 when M(X,Y,n)=1, ST ← 0 when M(X,Y,n)=0
A test is made to find if the selected memory bit is logic. 1
Status is set depending on the result.
Branch on status 1
Conditional depending on the status
Ⅳ
Branch address a (Addr)
When ST =1 : BA ← BB, PA ← PB, PC ← a (Addr)
When ST = 0 : PC ← PC + 1, ST ← 1
Note : PC indicates the next address in a fixed sequence that
is actually pseudo-random count.
For some programs, normal sequential program execution
can be change.
A branch is conditionally implemented depending on the
status of results obtained by executing the previous
instruction.
Branch instruction is always conditional depending on the status.
a. If the status is reset (logic 0), a branch instruction is not
b. If the status is set (logic 1), a branch instruction is executed as
Branch is available in two types - short and long. The former
is for addressing in the current page and the latter for
addressing in other block/page.
Which type of branch to execute is decided according to the BB and PB
register. To execute a long branch, data of the BB or PB register should
in advance be modified to a desired block/page address through the
LBBY or LPBI instruction.
rightly executed but the next instruction of the sequence is executed.
follows.
Page 26 of 36
3. Instruction
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