ADAM24P08 ETC, ADAM24P08 Datasheet - Page 18
ADAM24P08
Manufacturer Part Number
ADAM24P08
Description
Remote Control Transmitter
Manufacturer
ETC
Datasheet
1.ADAM24P08.pdf
(37 pages)
- Current page: 18 of 37
- Download datasheet (469Kb)
www.DataSheet.co.kr
2. Architecture
2.12. Watch Dog Timer (WDT)
in the first step of WDT after WDT reset. If this counter was overflowed, reset
signal automatically comes out so that internal circuit is initialized.
instruction (WDTR), Power-on reset pulse or Low VDD detection pulse.
Watch dog timer is organized binary of 14 steps. The signal of f
The overflow time is 8×6×2
Normally, the binary counter must be reset before the overflow by using reset
* It is constantly reset in STOP mode. When STOP is released, counting is
Reset by instruction
restarted. ( Refer to 2.14. STOP Operation)
Power-On Reset
(WDTR)
Stop Mode
f
OSC
/48
Fig 2-4 Block Diagram of Watch-dog Timer
Page 17 of 36
13
/f
OSC
(108.026ms at f
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Binary counter(14 steps)
RESET (
edge-trigger
OSC
= 3.64MHz)
)
1
OSC
/48 cycle comes
ADAM24PXX
CPU reset
Datasheet pdf - http://www.DataSheet4U.net/
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