WM8959 Wolfson Microelectronics Ltd., WM8959 Datasheet - Page 19
![no-image](/images/no-image-200.jpg)
WM8959
Manufacturer Part Number
WM8959
Description
Mobile Multimedia DAC with Dual-mode Class AB/D Speaker Driver
Manufacturer
Wolfson Microelectronics Ltd.
Datasheet
1.WM8959.pdf
(155 pages)
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Test Conditions
DCVDD = 1.8V, DBVDD = 3.3V, AVDD = HPVDD = 3.3V, SPKVDD = 5V, T
PGA gain = 0dB, 24-bit audio data unless otherwise stated.
PARAMETER
Analogue Reference Levels
H1
Microphone Bias
H2
H3
H4
H5
Digital Input / Output
H6
H7
Note that digital input pins should not be left unconnected / floating.
Internal pull-up/pull-down resistors may be enabled on GPIO1, GPIO3, GPIO4 and GPIO5 if required.
H8
H9
H10
H11
PLL
H12
H13
GPIO
H14
H15
H16
VMID Midrail Reference Voltage
Bias Voltage
Bias Current Source
Output Noise Density
AVDD PSRR (217Hz)
Input HIGH Level
Input LOW Level
Output HIGH Level
Output LOW Level
Input capacitance
Input leakage
Input Frequency
Lock time
Clock output duty cycle
(Integer OPCLKDIV)
Clock output duty cycle
(Non-integer OPCLKDIV)
Interrupt response time for accessory /
button detect
M1BSEL=0 / M2BSEL=0
M1BSEL=1 / M2BSEL=1
100mV pk-pk @217Hz
SYSCLK=PLL output;
SYSCLK=PLL output;
SYSCLK=PLL output;
Input not de-bounced
TEST CONDITIONS
OPCLKDIV=0000
OPCLKDIV=1000
OPCLKDIV=0000
OPCLKDIV=1000
OPCLKDIV=0100
OPCLKDIV=0100
Input de-bounced
Input de-bounced
3mA load current
3mA load current
PRESCALE = 0b
PRESCALE = 1b
SYSCLK=MCLK;
SYSCLK=MCLK;
SYSCLK=MCLK;
1kHz to 20kHz
TOCLKSEL=1
I
on AVDD
I
OH
OL
=-1mA
=1mA
A
= +25
0.7×DBVDD
0.9×DBVDD
2
2
o
21
19
C, 1kHz signal, fs = 48kHz,
/ f
/ f
-3%
-5%
-5%
-0.9
MIN
10
20
35
45
45
45
33
33
SYSCLK
SYSCLK
0.65×AVDD
0.9×AVDD
AVDD/2
TYP
100
200
45
10
0
PP, May 2008, Rev 3.1
0.3×DBVDD
0.1×DBVDD
2
2
22
20
+3%
+5%
+5%
/ f
/ f
0.9
17
34
65
55
55
55
66
66
MAX
3
WM8959
SYSCLK
SYSCLK
nV/√Hz
MHz
MHz
mA
dB
uA
19
UNIT
pF
us
%
%
%
%
%
%
V
V
V
V
V
V
V
s
s
s
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