ATA5771 ATMEL Corporation, ATA5771 Datasheet - Page 133

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ATA5771

Manufacturer Part Number
ATA5771
Description
Manufacturer
ATMEL Corporation
Datasheet

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8006G–AVR–01/08
Table 11-6
Table 11-6.
Note:
Table 11-7
rect PWM mode.
Table 11-7.
Note:
• Bits 3, 2 – Res: Reserved Bits
These bits are reserved bits in the ATtiny24/44/84 and will always read as zero.
• Bits 1:0 – WGM01:0: Waveform Generation Mode
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of
Pulse Width Modulation (PWM) modes (see
COM0B1
COM0B1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
shows COM0B1:0 bit functionality when WGM02:0 bits are set to fast PWM mode.
pare Match is ignored, but the set or clear is done at BOTTOM. See
page 74
pare Match is ignored, but the set or clear is done at TOP. See
page 76
shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase cor-
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
COM0B0
COM0B0
for more details.
for more details.
0
1
0
1
0
1
0
1
Description
Normal port operation, OC0B disconnected.
Reserved
Clear OC0B on Compare Match when up-counting. Set OC0B on
Compare Match when down-counting.
Set OC0B on Compare Match when up-counting. Clear OC0B on
Compare Match when down-counting.
Description
Normal port operation, OC0B disconnected.
Reserved
Clear OC0B on Compare Match, set OC0B at BOTTOM
(non-inverting mode)
Set OC0B on Compare Match, clear OC0B at BOTTOM
(inverting mode)
Table
11-8. Modes of operation supported by the Timer/Counter
“Modes of Operation” on page
(1)
(1)
“Phase Correct PWM Mode” on
ATtiny24/44/84
“Fast PWM Mode” on
73).
81

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